Differentiate Up And Down - Difu(13) And Difd(14) - Omron C200H Operation Manual

Bit Control Instructions
Flags
5-7-2 DIFFERENTIATE UP and DOWN – DIFU(13) and DIFD(14)
Limitations
Description
Flags
Precautions
Example 1:
When There is No
Differentiated Instruction
There are no flags affected by these instructions.
Ladder Symbols
DIFU(13) B
DIFD(14) B
Any output bit can generally be used in only one instruction that controls its
status. Refer to 3-3 IR Area for details.
DIFU(13) and DIFD(14) are used to turn the designated bit ON for one cycle
only.
Whenever executed, DIFU(13) compares its current execution with the previ-
ous execution condition. If the previous execution condition was OFF and the
current one is ON, DIFU(13) will turn ON the designated bit. If the previous
execution condition was ON and the current execution condition is either ON
or OFF, DIFU(13) will either turn the designated bit OFF or leave it OFF (i.e.,
if the designated bit is already OFF). The designated bit will thus never be
ON for longer than one cycle, assuming it is executed each cycle (see Pre-
cautions, below).
Whenever executed, DIFD(14) compares its current execution with the previ-
ous execution condition. If the previous execution condition was ON and the
current one is OFF, DIFD(14) will turn ON the designated bit. If the previous
execution condition was OFF and the current execution condition is either
ON or OFF, DIFD(14) will either turn the designated bit OFF or leave it OFF.
The designated bit will thus never be ON for longer than one cycle, assuming
it is executed each cycle (see Precautions, below).
These instructions are used when differentiated instructions (i.e., those pre-
fixed with an @) are not available and single-cycle execution of a particular
instruction is desired. They can also be used with non-differentiated forms of
instructions that have differentiated forms when their use will simplify pro-
gramming. Examples of these are shown below.
There are no flags affected by these instructions.
DIFU(13) and DIFD(14) operation can be uncertain when the instructions are
programmed between IL and ILC, between JMP and JME, or in subroutines.
Refer to 5-8 INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03), 5-9
JUMP and JUMP END – JMP(04) and JME(05), and 5-20 Subroutines and
Interrupt Control for details.
In diagram A, below, whenever CMP(20) is executed with an ON execution
condition it will compare the contents of the two operand words (HR 10 and
DM 0000) and set the arithmetic flags (GR, EQ, and LE) accordingly. If the
execution condition remains ON, flag status may be changed each cycle if
the content of one or both operands change. Diagram B, however, is an ex-
Section 5-7
Operand Data Areas
B: Bit
IR, AR, HR, LR
B: Bit
IR, AR, HR, LR
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