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3.3
Host Port Interface Control Register (HPIC)
The host port interface control register (HPIC) stores configuration and control information for the HPI. As
shown in
Figure 26
not have the same access permissions. The owner (Host) of HPIC has full read/write access; the
non-owner (DSP) of HPIC has primarily read-only access, but the exceptions are:
• the non-owner (DSP) can write 1 to the HINT bit to generate an interrupt to the host.
• the non-owner (DSP) can write 1 to HPI_RST bit to cause an HPI software reset.
Figure 26. Host Port Interface Control Register (HPIC) – Owner (Host) Access Permissions
31
15
Reserved
7
6
HPI_RST
Reserved
(1)
R/W-0
LEGEND: R/W = Read/Write; R = Read only; W1C = Write 1 to clear (writing 0 has no effect);; -n = value after reset
(1)
Default value after reset = 0, when HPI boot used. See
Figure 27. Host Port Interface Control Register (HPIC)–Non-owner (DSP) Access Permissions
31
15
Reserved
7
6
HPI_RST
Reserved
(1)
LEGEND: R/W = Read/Write; R = Read only; W1C = Write 1 to clear (writing 0 has no effect);; -n = value after reset
(1)
Default value after reset = 0, when HPI boot used. See
SPRUF87A – October 2007 – Revised May 2008
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and
Figure 27
and described in
12
R-0
5
4
FETCH
R/W-0
Table 8
12
R-0
5
4
FETCH
R-0
R-0
Table 8
Table
8, the owner (Host) and non-owner (DSP) do
Reserved
R-0
11
10
HPIASEL
Reserved
R/W-0
R/W-0
3
2
Reserved
HINT
R-1
R/W1C-0
for details.
Reserved
R-0
11
10
HPIASEL
Reserved
R-0
R-0
3
2
Reserved
HINT
R-1
R/W-0
for details.
Registers
16
9
8
DUALHPIA
HWOBSTAT
R/W-0
R-0
1
0
DSPINT
HWOB
R/W-0
R/W-0
16
9
8
DUALHPIA
HWOBSTAT
R-0
R-0
1
0
DSPINT
HWOB
R/W1C-0
R-0
Host Port Interface (HPI)
37
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