Logic Output Characteristics (Status[1:0], Gpio[6:5], Gpio2/Sdo); C Interface Characteristics (Sda, Scl); Submit Documentation Feedback; Spi Timing Requirements (Sda, Scl, Gpio1/Scs, Gpio2/Sdo) - Texas Instruments LMK05028 Advance Information
Low-jitter dual channel clock synchronizer with eight outputs and integrated eeprom
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3-Level Logic Input Characteristics (HW_SW_CTRL, STATUS[1:0]) (continued)
VDD = 3.3 V ± 5%, VDDO = 1.8 V ± 5%, 2.5 V ± 5%, 3.3 V ± 5%, T
PARAMETER
I
Input high current
IH
I
Input low current
IL
C
Input capacitance
IN
7.18 Logic Output Characteristics (STATUS[1:0], GPIO[6:5], GPIO2/SDO)
VDD = 3.3 V ± 5%, VDDO = 1.8 V ± 5%, 2.5 V ± 5%, 3.3 V ± 5%, T
PARAMETER
V
Output high voltage
OH
V
Output low voltage
OL
t
/t
Output rise/fall time
R
F
2
7.19 I
C Interface Characteristics (SDA, SCL)
VDD = 3.3 V ± 5%, VDDO = 1.8 V ± 5%, 2.5 V ± 5%, 3.3 V ± 5%, T
PARAMETER
V
Input high voltage
IH
V
Input low voltage
IL
I
Input leakage
IH
C
Input capacitance
IN
V
Output low voltage
OL
f
SCL clock rate
SCL
f
SCL clock rate
SCL
START condition setup
t
SU_STA
time
t
START condition hold time
H_STA
t
SCL pulse width high
PH_STA
t
SCL pulse width low
PL_STA
t
SDA hold time
SU_SDA
t
SDA setup time
H_SDA
t
SCL/SDA input rise time
R_IN
t
SCL/SDA input fall time
F_IN
t
SDA output fall time
F_OUT
t
STOP condition setup time
SU_STOP
Bus free time between
t
BUS
STOP and START
t
Data valid time
VD-DAT
Data valid acknowledge
t
VD-ACK
time
7.20 SPI Timing Requirements (SDA, SCL, GPIO1/SCS, GPIO2/SDO)
VDD = 3.3 V ± 5%, VDDO = 1.8 V ± 5%, 2.5 V ± 5%, 3.3 V ± 5%, T
PARAMETER
f
SCL clock rate
Clock
t
SCS to SCL setup time
1
t
SDI to SCL setup time
2
t
SDI to SCL hold time
3
t
SCL high time
4
t
SCL low time
5
Copyright © 2018, Texas Instruments Incorporated
TEST CONDITIONS
V
= VDD
IH
V
= GND
IL
TEST CONDITIONS
I
= 3 mA, LVCMOS mode
OH
I
= 3 mA
OL
20% to 80%, LVCMOS mode, 1 kΩ to GND
TEST CONDITIONS
I
= 3 mA
OL
Standard
Fast mode
SCL high before SDA low
SCL low after SDA low
SDA valid after SCL low
C
≤ 400 pF
BUS
Product Folder Links:
= –40ºC to 85ºC
A
MIN
–40
–40
= –40ºC to 85ºC
A
MIN
TBD
= –40ºC to 85ºC
A
MIN
1.2
–15
0.6
0.6
0.6
1.3
0
100
0.6
1.3
= –40ºC to 85ºC
A
MIN
10
10
10
25
25
Submit Documentation Feedback
LMK05028
LMK05028
SNAS724 – FEBRUARY 2018
TYP
MAX
UNIT
40
uA
40
uA
2
pF
TYP
MAX
UNIT
V
0.6
V
500
ps
NOM
MAX
UNIT
V
0.5
V
15
uA
1
pF
0.3
V
100
kHz
400
kHz
us
us
us
us
0.9
us
ns
300
ns
300
ns
300
ns
us
us
0.9
us
0.9
us
NOM
MAX
UNIT
20
MHz
ns
ns
ns
ns
ns
13
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