Hrdy Behavior During A Data Write Operation In The 16-Bit Multiplexed Mode (Case 1: No Auto-Incrementing); Hrdy Behavior During A Data Write Operation In The 16-Bit Multiplexed Mode; Hrdy Behavior During A Data Write Operation In The 16-Bit Multiplexed Mode (Case 2: Auto-Incrementing Selected, Fifo Empty Before Write); Hrdy Behavior During A Data Write Operation In The 16-Bit Multiplexed Mode (Case 3: Auto-Incrementing Selected, Fifo Not Empty Before Write) - Texas Instruments TMS320C6452 User Manual

Peripheral Architecture
Figure 11. HRDY Behavior During a Data Write Operation in the 16-bit Multiplexed Mode
HCS
HAS
HCNTL[1:0] 10
HR/W
HHWIL
Internal
HSTRB
HD[15:0]
HRDY
Figure 12 shows auto-increment HPID write cycles when the write FIFO is empty prior to the HPIA write.
The host writes the memory address while HCNTL[1:0] = 10b and writes the data while HCNTL[1:0] = 01b.
HRDY does not go low during any of the HPID write cycles until the FIFO is full.
Figure 12. HRDY Behavior During a Data Write Operation in the 16-bit Multiplexed Mode
(Case 2: Auto-incrementing Selected, FIFO Empty Before Write)
HCS
HAS
10
HCNTL[1:0]
HR/W
HHWIL
Internal
HSTRB
HD[15:0]
HRDY
Figure 13 shows a case similar to that of
not empty when the HPIA access is made. HRDY goes low twice for the first halfword access of the HPIA
write cycle. The first HRDY low period is due to the nonempty FIFO. The data currently in the FIFO must
first be written to the memory. This results in HRDY going low immediately after the falling edge of the
data strobe (HSTRB). The second and third HRDY low periods occur for the writes to the HPIA. HRDY
remains high for the HPID accesses.
Figure 13. HRDY Behavior During a Data Write Operation in the 16-bit Multiplexed Mode
(Case 3: Auto-incrementing Selected, FIFO Not Empty Before Write)
HCS
HAS
HCNTL[1:0] 10
HR/W
HHWIL
Internal
HSTRB
HD[15:0]
HRDY
24 Host Port Interface (HPI)
(Case 1: No Auto-incrementing)
10
1st halfword
10
1st halfword 2nd halfword
Figure
10
1st halfword 2nd halfword
11
2nd halfword 1st halfword
01 01
1st halfword
12. However, in the case of
01 01
1st halfword
SPRUF87A – October 2007 – Revised May 2008
www.ti.com
11
2nd halfword
01
2nd halfword 1st halfword
Figure 13, the write FIFO is
01
2nd halfword 1st halfword
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