Casio MP-2000 Service Manual page 51

Mono Mono
65550 SS DD
Pin
Pin# 8-bit 8-bit
Name
71 P0 – UD3
72 P1 – UD2
73 P2 – UD1
74 P3 – UD0
75 P4 – LD3
76 P5 – LD2
78 P6 – LD1
79 P7 – LD0
81 P8 P0 –
82 P9 P1 –
83 P10 P2 –
84 P11 P3 –
85 P12 P4 –
86 P13 P5 –
87 P14 P6 –
88 P15 P7 –
90 P16 – –
91 P17 – –
92 P18 – –
93 P19 – –
94 P20 – –
95 P21 – –
96 P22 – –
97 P23 – –
70 SHFCLK SHFCLK SHFCLK
Pixels/ 8 8
Clock:
Note: The 65550 also supports panel interfaces that transfer one pixel per word, but which use both edges or SHFCLK
to transfer one pixel on each edge. See FR12[0].
Note: The higher order output lines should be used when only 9 or 12 bits are needed from the 9/12/16-bit TFT
interface, or when only 18 bits are needed from the 18/24-bit TFT or TFT HR interfaces. The lower order bits
should be left unconnected
Mono Color Color
DD TFT TFT
9/12/16 18/24
16-bit
bit bit
UD7 B0 B0
UD6 B1 B1
UD5 B2 B2
UD4 B3 B3
UD3 B4 B4
UD2 G0 B5
UD1 G1 B6
UD0 G2 B7
LD7 G3 G0
LD6 G4 G1
LD5 G5 G2
LD4 R0 G3
LD3 R1 G4
LD2 R2 G5
LD1 R3 G6
LD0 R4 G7
– – R0
– – R1
– – R2
– – R3
– – R4
– – R5
– – R6
– – R7
SHFCLK SHFCLK SHFCLK
16 1 1
— 50 —
Color
Color Color
STN
TFT HR STN SS STN SS
18/24 8-bit 16-bit
bit (X4bp) (4bp)
B00 R1 R1
B01 B1 G1
B02 G2 B1
B03 R3 R2
B10 B3 G2
B11 G4 B2
B12 R5 R3
B13 B5 G3
G00 SHFCLKU B3
G01 – R4
G02 – G4
G03 – B4
G10 – R5
G11 – G5
G12 – B5
G13 – R6
R00 – –
R01 – –
R02 – –
R03 – –
R10 – –
R11 – –
R12 – –
R13 – –
SHFCLK SHFCLK SHFCLK
2 2-2/3 5-1/3
Color Color Color
STN DD STN DD STN DD
8-bit 16-bit
24-bit
(4bp) (4bp)
UR1 UR0 UR0
UG1 UG0 UG0
UB1 UB0 UB0
UR2 UR1 LR0
LR1 LR0 LG0
LG1 LG0 LB0
LB1 LB0 UR1
LR2 LR1 UG1
– UG1 UB1
– UB1 LR1
– UR2 LG1
– UG2 LB1
– LG1 UR2
– LB1 UG2
– LR2 UB2
– LG2 LR2
– – LG2
– – LB2
– – UR3
– – UG3
– – UB3
– – LR3
– – LG3
– – LB3
SHFCLK SHFCLK SHFCLK
2-2/3 5-1/3 8