GE MiCOM P747 Agile Technical Manual page 17

Table of Figures
Figure 1: Functional Overview
Figure 2: Hardware architecture
Figure 3: Exploded view of IED
Figure 4: Front panel (80TE)
Figure 5: Rear view of populated 80TE case
Figure 6: Terminal block types
Figure 7: Rear connection to terminal block
Figure 8: Main processor board
Figure 9: Combined coprocessor and isolated digital input board
Figure 10: Power supply board
Figure 11: Power Supply Assembly
Figure 12: Power Supply Terminals
Figure 13: Watchdog contact terminals
Figure 14: Rear serial port terminals
Figure 15: Input Module - 1 transformer board
Figure 16: Input module schematic
Figure 17: Instrument Transformer board
Figure 18: Main input board
Figure 19: Output relay board - 8 contacts
Figure 20: IRIG-B board
Figure 21: Fibre optic board
Figure 22: Rear communication board
Figure 23: Ethernet board
Figure 24: Redundant Ethernet board
Figure 25: Menu navigation
Figure 26: Default display navigation
Figure 27: Current Differential Protection
Figure 28: Compensation using biased differential characteristic
Figure 29: Multiple tripping criteria
Figure 30: Topology replica function
Figure 31: Zone tripping characteristic.
Figure 32: Check zone supervision characteristic.
Figure 33: Circuitry check characteristic.
Figure 34: Example of busbar dead-zone
Figure 35: Dead-zone logic
Figure 36: CBF initiated by internal signal
Figure 37: CBF initiated by external signal
Figure 38: Busbar topology used in configuration example.
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