Appendix B Digital I/O; B.1 About Digital I/O; B.2 Digital I/O Programming - AXIOMTEK CAPA500 User Manual

6th/ 7th generation intel core processor family 3.5” board
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B.1 About Digital I/O

The digital I/O on CPU board has 8 bits. Each bit can be set to function as input or output by
software programming. In default, all pins are pulled high with +5V level (according to main
power). The BIOS default settings are 3 inputs and 5 outputs where all of these pins are set to
1.

B.2 Digital I/O Programming

2
I
C to GPIO PCA9554PW GPIO.
2
I
C address: 01000100.
Command byte
Command
Protocol
0
Read byte
1
Read/write byte
2
Read/write byte
3
Read/write byte
The command byte is the first byte to follow the address byte during a write transmission. It is
used as a pointer to determine which of the following registers will be written or read.
Digital I/O
®
CAPA500 Intel
Core
Pin
1
3
5
7
9
Function
Input port register
Output port register
Polarity inversion register
Configuration register
TM
Processor Family 3.5" Board
Appendix B
Digital I/O
CN9
1
Signal
Pin
Signal
DI0
2
DO4
DI1
4
DO3
DI2
6
DO2
DO0
8
DO1
+5V
10
GND
71

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