Inverter Connector (Cn3); Lvds Connector (Cn4) - AXIOMTEK CAPA500 User Manual

® TM
CAPA500 Intel Core
2.5.3

Inverter Connector (CN3)

This is an 8-pin connector which is compliant with Hirose DF13-8P-1.25C for inverter.
We strongly recommend you to use the matching DF13-8P-1.25C connector to avoid
malfunction.
Pin
1
2
3
4
5
6
7
8
2.5.4

LVDS Connector (CN4)

This board has a 2x20-pin connector which is compliant with JST SHDR-40VS-B for
LVDS LCD interface. It is strongly recommended to use the matching JST
SHDR-40VS-B connector for LVDS interface. Pin 1~6 VCCM can be set to +3.3V, +5V or
+12V by setting JP1 (see section 2.4.1).
18-bit single channel
Pin Signal
1 VCCM
3 VCCM
5 VCCM
7 N.C.
9 GND
11 N.C.
13 N.C.
15 GND
17 N.C.
19 N.C.
21 GND
23 Channel A D0-
25 Channel A D0+
27 GND
29 Channel A D1-
31 Channel A D1+
33 GND
35 Channel A D2-
37 Channel A D2+
39 GND
14
Processor Family 3.5" Board
Signal
VBL1 (+12V level)
VBL1 (+12V level)
VBL2 (+5V level)
VBL_ENABLE
GND
GND
GND
VBL Brightness Control
Pin Signal
2 VCCM
4 VCCM
6 VCCM
8 N.C.
10 GND
12 N.C.
14 N.C.
16 GND
18 N.C.
20 N.C.
22 GND
24 N.C.
26 N.C.
28 GND
30 N.C.
32 N.C.
34 GND
36 Channel A CLK-
38 Channel A CLK+
40 GND
8 1
Board and Pin Assignments