Epson PX-8 Technical Manual page 165

REV.-A
3.2.2 Function Circuit Blocks
Fig. 3-30 is a functional block diagram of the RAM disk unit.
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~AM
ADDRESS
~
Address bus
H
RAM
BANK 1
Z-80
" " /
"'-7
GAH400
~
27C32
I/O selector
.-
hi
~~~~~~
~
2.45MHz
Tequencr
divider
IE-
-I
RAM
II
circuit
-\
BANK2
1\
~
-/
..r::
Interrupt
0
~:!:::
II-
U
-
o~s~
DATA BUS
~
~ Q) c.:
<Il >Q)U
~;
I
:::J
OJ
-
9.8 MHz
co
-
-
clock
en
~ OC
oscillator
INPUT
OUTPUT
-
-
~
BUFFER
BUFFER
~
<"r
4~
32.768 kHz
Command
clock
decoder
~
oscillator
80H 81H
~7
Address decoder
BUS. BUFFER iE---OIR
~~
/'),.
Power supply circuit
~
B attery
AO...,A7
00"'07
~~---------------------------------
-----------------------------)
V
TO Main Frame
Fig. 3-30 RAM Disk Unit Block Diagram
The RAM disk unit includes a power supply circuit, hand-shaking circuits such as an address and
command decoders and a status latch, etc.; a DRAM control circuit; a interrupt control circuit; a
data bus input/output control circuit; two clock-oscillator circuits; and an I/O selector circuit. etc.
Data are transferred between the Main Frame and RAM disk main CPUs (i.e., read/write operation
for RAM disk unit by referring to the status latch. The CPUs have their own memory spaces inde-
pendent from each other and data transfers between them are accomplished in forms of I/O
read/write operations.
3-19
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