Epson PX-8 Technical Manual page 169

REV.-A
2. Backup circuit
The backup circuit supplies power required to protect data in the DRAM.
Table 3-5 lists the elements backed up by this circuit.
Table 3.5 Backed Up Elements
Element Drawing coordination Function Element Drawing coordination Function
lC F-l 12
Read/write control
gate array
17B ~ lOB
G-2~
6 D-RAM
17A ~ lOA H-2 ~6 D-RAM
9A H-l Gate
3C F-3 Gate
3C A, B-7 Gate
These elements are powered from a special line called "Backup" and always active; they are po-
wered by the operating voltage supply while Main Frame is on and from the backup voltage while
off.
1) Power supply paths to the backup line )
There are the six paths listed in table 3-6 which are selected to supply power to the backup
line depending on the various conditions. The abbreviations used in the table mean the follow-
ing:
V
Bl
Main Frame battery voltage
Vx RAM disk unit battery voltage
Battery: RAM disk unit battery
Tabel 3-6 Backup Line Supply Paths
Main Frame power AC adapter Battery voltage relation Path
Connected
-
VCH .....
02 ..... Rl ..... 01 .....
OFF Not connected
VB1
>
Vx
VB1 .....
03 ..... R2 ..... 01 .....
Not connected
VB1
<
Vx
Battery ..... CN2 ..... SW2 ..... 01 .....
Connected
-
VCH .....
01 ..... R36 ..... 02 .....
ON Not connected
VB1
>
Vx
VB1 .....
02
.....
Not connected
VBl
<
Vx
Battery ..... CN2 ..... SW2 ..... R3
-+
04
-+
02
-+
The backup line is powered either transistor 01 or 02 depending on whether Main Frame power
is on or off.
*
While Main Frame is off, VL is low because the logic circuit operating voltage is not supplied.
This maintains transistor 04 cut off and the collector is pulled up high through resistor R37.
Thus, transistors Q2 and 03 remain cut off.
VL is also connected to the base of 01 through diodes 07, 08, and 09. The emitter of 01 is
connected to VB1 or the RAM disk battery voltage and normally maintained at +5V. The
source is also connected to the base through R29. Because the base is connected to the signal
ground through 07, 08, and R34, the current, which flows from the base to the ground unless
the junction of 08 and R34 is pulled up to the VL line, generates a potential across the emitter
and base. That is, transistor 01 conducts due to this potential while Main Frame is off.
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