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3.7
Ethernet Compliant Applications Modes
(COMPAT = High)
The following sections discuss Ethernet compliant applications modes as implemented by
the MC92603. Different Ethernet operations and protocols as described in the IEEE Std.
802.3-2002 specification [4], are also discussed.
3.7.1
Interface to Ethernet MAC
The operation of the transceivers in the Ethernet-compatible GMII and TBI modes and the
correlation of the port signal names to the names in the IEEE Std. 802.3-2002 specification
[4] are listed in the following two sections.
3.7.1.1
GMII Operation
Ethernet GMII mode is enabled by negating the TBIE input as low and asserting the
COMPAT input high. When in this mode, the receiver should be connected to a standard
Gigabit Ethernet MAC, as shown in Table 3-9.
Table 3-9. GMII Connection to Standard Ethernet MAC
IEEE Std. 802.3-2002
Signal Name
GTX_CLK
Transmit clock
TX_EN
Transmit enable
TX_ER
Force error on transmitted byte
TXD<7:0>
Transmit data
RX_CLK
Receive clock
RXD<7:0>
Receive data
RX_ER
Receiver has detected an error
RX_DV
Receiver has detected data
CRS
Receiver has sensed a carrier
MDC
Management data clock
MDIO
Management data input/output
The following MAC half-duplex input must be externally pulled up/down as indicated
COL
Receiver has sensed a collision
The following MC92603 inputs must be externally pulled up/down as indicated
Pull up
Management interface enable
Variable (PUP/PUD)
MDIO PHY address
Pull down
Disable disparity based sync event
Pull down
Disable unused transmitter input
Pull down
Configuration input—put in 8-bit mode
Pull up
Configuration input—put in byte
synchronized mode
Pull down
Configuration inputs—disable word
alignment
MOTOROLA
Ethernet Compliant Applications Modes (COMPAT = High)
Function
Chapter 3. Receiver
Direction
(Relative to
Port Name
MC92603)
Input
XMIT_x_CLK
Input
XMIT_x_ENABLE
Input
XMIT_x_ERR
Input
XMIT_x_7:0]
Output
RECV_x_RCLK
Output
RECV_x_[7:0]
Output
RECV_x_ERR
Output
RECV_x_DV
Output
RECV_x_CRS
Input
MD_CLK
Bidirectional
MD_DATA
Pull down
Input
MDIO_EN
Input
MD_ADR[4:2]
Input
XMIT_DSYNC
Input
XMIT_x_K
Input
Input
BSYNC
Input
WSYNC1 and WSYNC0
—
TBIE
3-15
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