Double Data Rate Operation-Rgmi And Rtbi - Motorola MC92603 Reference Manual

Ethernet Compliant Applications Modes (COMPAT = High)
The receiver interface error and status in TBI mode is shown in Table 3-12.
Table 3-12. Receiver Interface Error and Status Codes (TBI Mode)
RECV_x_ RECV_x_
1
K COMMA
Low Low
Low High
High Don't care
High Don't care
High Don't care
1
RECV_x_K is not a standard TBI signal. These errors may be detected by monitoring only the10-bit data field since
the 3 error codes are not valid 10-bit encoded data.
2
The priority column shows the error that is reported if multiple errors occur at the same time. The lower numbered
priority errors are reported first.
3.7.1.3 Double Data Rate Operation—RGMI and RTBI
Functionally, the double data rate operation (DDR is high) is identical to the previously
mentioned receiver GMII and TBI operating modes. The only difference is at the chip
parallel data interfaces. Data outputs are shared and defined uniquely, depending on each
phase of the output clock (RECV_x_RCLK). The RGMII and RTBI interfaces are shown
in Table 3-13 and Table 3-14, respectively.
Clock Edge
Rising
Falling
Rising Edge of
Clock
RECV_x_RCLK
RECV_x_RCLK_B
3-18
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual
RECV_x_ RECV_x_
ERR DV
Data[9] Data[8]
Data[9] Data[8]
Don't care Don't care
Don't care Don't care
Don't care Don't care
Table 3-13. Receiver RGMII Interface
RECV_x_DV
RX_DV
GMII_RX_ER (XOR) GMII_RX_DV
Table 3-14. Receiver RTBI Interface
RECV_x_COMMA
COM_DET
COM_DET
RECV_x_
2
Priority
[7:0]
Data[7:0] 6 Normal operation, non-COMMA
code group received.
Data[7:0] 5 Normal operation, COMMA (K28.1,
K28.5, or K28.7) code group
received.
0x04 3 Overrun
0x02 3 Underrun
0x00 1 Not byte sync: the receiver is in
start-up or has lost byte alignment
and is searching for alignment.
RECV_x_[3:0]
Data bit [3:0]
Data bit [7:4]
RECV_x_DV RECV_x_[3:0]
Data bit 4
Data bit 9
Description
Data bit [3:0]
Data bit [8:5]
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