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Ethernet Compliant Applications Modes (COMPAT = High)
2.5.1
Transmitting Uncoded Data—GMII or RGMII Modes
The following sections discuss the operating process for uncoded data (GMII or RGMII
interface) transmissions.
2.5.1.1
Auto-Negotiation Process
Operating in the Ethernet compatibility mode, the MC92603 implements the
auto-negotiation function at the PCS sublayer for 1000BASE-X as defined in Clause 37 of
IEEE Std 802.3-2002 specification [4].
The transmitter enters auto-negotiate mode (if auto-negotiate is enabled) when one of five
events occur.
• The part is reset
• The part is requested to restart the auto-negotiation process through the MDIO
interface
• The part is reconfigured through the MDIO interface
• The associated receiver loses byte synchronization
• The associated receiver detects an auto-negotiate sequence initiated by its link
partner
When an auto-negotiate sequence is started, the transmitter initially sends at least
10 milliseconds of /C1/C2/ sequences with all zeros as the Configuration Register contents.
This forces the remote device to also enter auto-negotiate mode.
The contents of the configuration register are continuously sent until the associated receiver
detects the compatible configuration being sent from the link partner. The MC92603 is
configured as full-duplex 1-Gigabit; therefore, the configuration is as shown in Figure 2-2.
For register details, see Section 4.2.4, "MDIO RA 4—Auto-Negotiation Advertisement
Register."
Bit
15
14
2
Function Next
Ack
1
Page
Value
0
1/0
1
Next Page—MC92603 does not support multiple pages of configuration registers.
2
Ack—Asserted when the receiver detects a valid configuration from the other transmitter.
3
RF1 and RF2— 'Remote faults' as detected by the receiver.
4
PS1 and PS2—Pause control bits that reflect the values of MDIO register 4's bits 12 and 13, respectively. This
register may be modified via the MDIO interface.
5
HD—MC92603 does not support half-duplex mode.
6
FD—MC92603 always runs in full-duplex mode.
2-10
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual
13
12
11
10
3
3
RF2
RF1
Reserved
1/0
1/0
0
0
Figure 2-2. Configuration Register
9
8
7
6
5
4
4
5
PS2
PS1
HD
FD
0
0
0
0
1
4
3
2
1
6
Reserved
0
0
0
0
MOTOROLA
0
0
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