Motorola MC92603 Reference Manual page 44

Quad gigabit ethernet transceiver
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Receiver Interface Signals
Table 3-1. MC92603 Receiver Interface Signals (continued)
Signal Name
COMPAT
IEEE Std. 802.3-2002
compatibility mode enable
XCVR_x_LBE
Enable loopback
DROP_SYNC
Drop synchronization
RCCE
Recovered clock enable
ADIE
Add/delete idle enable
TBIE
Ten-bit interface enable
HSE
Half-speed enable
REPE
Repeater mode enable
ENAB_RED
Enable redundant mode
XCVR_x_RSEL
Select redundant channel Receive data from secondary (redundant)
MEDIA
Media impedance select
RECV_CLK_CENT Center recovered clock
TST_0/TST_1
Test mode
REF_CLK_P/N
PLL reference clock
RLINK_x_N/
Link serial receive data
RLINK_x_P
rx_clock
High-speed clock
loop_back_data
Loopback data
repeat_data
Repeater data
3-4
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual
Description
Indicates that the receiver is in a IEEE Std.
802.3-2002 compliant mode. If code group
addition/deletion is required to maintain
alignment, then special rules are followed that
non-intrusive to the IEEE Std. 802.3-2002
packet streams. See Section 3.7.2, "Rate
Adaption of Ethernet Packet Data Streams," for
more information.
Indicates that data into the receiver is to be taken
from the corresponding transmitter.
DROP_SYNC may be used with
XCVR_x_DISABLE to force a receiver to resync,
but it does not affect the transmitter operation.
Indicates that the output data is synchronized to
a recovered clock.
Indicates that the receiver is free to add/delete
code groups to/from the output data stream to
maintain alignment. See Section 3.7.2, "Rate
Adaption of Ethernet Packet Data Streams," for
more information. This input is ignored if RCCE
is high.
Indicates that the receiver interface is in a 10-bit
mode, and that the 8B/10B decoder is bypassed.
Indicates that the link and data interfaces are to
be operated at half-speed.
Causes data received to be transmitted over the
corresponding transmit channel. See
Section 5.5, "Repeater Mode," for details.
Enable redundant link operation.
channel.
Indicates the impedance of the transmission
media. When the MEDIA signal is negated low, it
indicates 50 Ω and when asserted high, it
indicates 75 Ω.
Indicates that the recovered clocks
(RECV_x_RCLK and RECV_x_RCLK_B) will be
centered relative to the receive data and status
outputs.
Indicates the operating/test mode of the device.
PLL reference clock input. The signal also
provides reference frequency for the receiver
interface when recovered clock mode is disabled
(RCCE is low).
Differential serial receive data input pads
Internal Signals
Internal, differential high speed clock, used to
transmit and receive link data.
Differential loopback receive data
Data received that is looped to the transmitter if
in repeater mode (REPE is asserted high). Test
feature only.
Function
Active
Direction
State
Input
High
Input
High
Input
High
Input
High
Input
High
Input
High
Input
High
Input
High
Input
High
Input
High
Input
Input
High
Input
Input
Input
Input
Input
Output
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