Receiver Interface Signals - Motorola MC92603 Reference Manual

3.2

Receiver Interface Signals

This section describes the interface signals of the MC92603 receiver. Each signal's name,
function, direction, and active state is described in Table 3-1. The table's signal names use
the letter 'x' as a place holder for the link identifier letter 'A' through 'D.' Internal signals
listed in the table are not available at the external interface of the device, but are presented
to help illustrate the device's operation.
Table 3-1. MC92603 Receiver Interface Signals
Signal Name
RECV_x_[7:0] Received byte
RECV_x_DV Data valid indicator
RECV_x_K Special data indicator
RECV_x_COMMA COMMA indicator
RECV_x_ERR Receiver error
RECV_x_RCLK Receiver clock
RECV_x_RCLK_B Receiver clock
complement
XCVR_x_DISABLE Transceiver disable
XMIT_x_K Transmitter/receiver input If TBIE is high, XMIT_x_K enables automatic
JPACK Enable Jumbo frames
RECV_REF_A Receiver A clock enable
WSYNC1 & Word synchronization
WSYNC0 modes
BSYNC Byte alignment mode
MOTOROLA
Description
Receive data bits 7 through 0
If TBIE is high, this is the receive data, bit 8.
If TBIE is low, this is data valid indicator.
If TBIE is high, this indicates that receiver has
detected an error. The type of error is indicated
in the data byte (RECV_x_7–RECV_x_0).
If TBIE is low, this indicates whether the 8-bit
receive data is a 'special' code group.
This is the COMMA DETECT indicator.
If TBIE is high, this is receive data, bit 9.
If TBIE is low, see Table 3-10 and Table 3-15.
Internally generated clock synchronized with
receiver data. If TBIE is high, then this clock
frequency is half of the data frequency.
If TBIE is high, this is the complement of
RECV_x_RCLK.
If TBIE is low, this signal is low.
When active receiver is disabled
realignment on COMMA code groups. If
XMIT_x_K is low, initial alignment on COMMAs
occurs but subsequent realignments are
disabled.
If TBIE is low, this signal is used by the
transmitter logic and ignored by the receiver
logic.
When high, this signal increases the depth of the
receive FIFO allowing longer packets of data
between bytes that may be repeated or dropped
to prevent overruns or underruns. Only needed if
RCCE is low (reference clock mode).
If RECV_REF_A and RCCE are high, then data
will be synchronized to Channel A's recovered
clock.
If either input is high, then all enabled receivers
are being used in unison to receive
synchronized data.
Indicates that byte alignment is required. If it is
low, no byte alignment is done.
Chapter 3. Receiver
Receiver Interface Signals
Function
Active
Direction
State
Output —
Output —
Output —
Output —
Output —
Output —
Input High
Input —
Input High
Input High
Input High
Input —
3-3