Interrupts - Omron CJ1W-CT021 Operation Manual

Interrupts

4-6

Interrupts

128
Example:
The High-speed Counter Unit is assigned Machine Number 2. You want to clear all
IOWR/IORD-instruction errors by issuing the IOWR-instruction with the Error
Clear command.
IOWR(223)
#EC00
-
#00010002
Note Writing the Error Clear Command with IOWR is also supported for Simple
Counters (refer to 3-2-1 "Simple Counter"). This enables you to clear IORD/IOWR-
instruction errors that occurred after you have issued the IORD-instruction "Cap-
tured Counter Value" or the IORD/IOWR-instruction "Counter Value" to a Simple
Counter.
The status information of the 2 Digital Inputs and the 32 Outputs is exchanged with
the CJ-series CPU Unit every I/O refresh via the Special I/O Unit Area. The I/O
refresh is executed cyclically at the end of the Ladder Program or can be forced by
I/O refresh instruction. In both cases the CJ-series CPU Unit takes the initiative for
a data-exchange. In order for the High-speed Counter Unit to be able to report the
status information of the 2 Digital Inputs and 32 Outputs to the CJ-series CPU
Unit, independent from the I/O Refresh, all Digital Inputs and Outputs can be con-
figured to generate interrupts. Important events, indicated by a status change of
the Digital Inputs and the Outputs, can thus be reported as quickly as possible to
the CJ-series CPU Unit.
Note External interrupts are supported only by CJ1-H and CJ1M CPU Units. They are
not supported by CJ1 CPU Units. If you want the High-speed Counter Unit to gen-
erate interrupts to activate external interrupt tasks in a CJ1-H CPU Unit, the Coun-
ter Unit must be in one of the five positions immediately to the right of the CJ1-H
CPU Unit on the CPU Rack. If you want the High-speed Counter Unit to generate
interrupts to activate external interrupt tasks in a CJ1M CPU Unit, the Unit must be
in one of the three positions immediately to the right of the CJ1M CPU Unit on the
CPU Rack.
No external interrupt tasks can be activated for CJ1-H or CJ1M CPU Units if the
CJ1W-CT021 High-speed Counter Unit is in any other position (i.e., 6th Unit posi-
tion or further away from the CJ1-H CPU Unit, or 4th Unit position or further away
from the CJ1M CPU Unit), or if it is on a CJ-series Expansion Rack. All external
interrupt tasks will be disabled in these cases.
CC1= EC, CC2= 00
S=Not relevant (fill in valid constant, e.g. D0400
containing #0000)
D= #0002 (Machine Number) and D+1= #0001 (# words)
Section 4-6