Bit Test Operations, For Cpu 103 And Higher - Siemens S5-100U User Manual

Simatic s5 programmable controller
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STEP 5 Operations
8.2.3

Bit Test Operations, for CPU 103 and Higher

Bit test operations scan digital operands bit by bit and affect them. Bit test operations must always
be at the beginning of a logic operation. Table 8-12 provides an overview of these operations.
Operation
Operand
TB
TBN
SU
RU
ID
T
C
D
RS
1
1
RS applies only to TB and TBN
Table 8-13 shows how the RLO is formed during the bit test operations "TB" and "TBN".
example for applying the bit operations follows the table.
Table 8-13. Effect of "TB" and "TBN" on the RLO
Operation
Signal state of the bit in
the operand indicated
Result of logic operation
8-42
Table 8-12. Overview of Bit Operations
Test a bit for signal state "1"
A single bit is scanned regardless of the RLO. The RLO is affected
according to the bit's signal state (see Table 8-13).
Test a bit for signal state "0"
A single bit is scanned regardless of the RLO. The RLO is affected
according to the bit's signal state (see Table 8-13).
Set a bit unconditionally
The addressed bit is set to "1" regardless of the RLO. The RLO is
not affected.
Reset a bit unconditionally
The addressed bit is set to "0" regardless of the RLO. The RLO is
not affected.
Parameter
0.0 to 127.15
0.0 to 127.15
0.0 to 255.15
0.0 to 255.15
TB
0
0
Meaning
TBN
1
0
1
1
1
0
S5-100U
An
EWA 4NEB 812 6120-02

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