Yamaha TF5 Service Manual page 93

PIN Outer
Name I/O
NO.
No
163 K1 DDR_D9 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
164 K2 DDR_D10 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
165 K3 DDR_D11 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
166 K4 DDR_D12 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
167 K5 VDDS_DDR VCC VDDS for DDR
168 K6 VDD_CORE VCC VDD for Core
169 K7 VSS GND GND
170 K8 VDD_CORE VCC VDD for Core
171 K9 VSS GND GND
172 K10 VSS GND GND
173 K11 VSS GND GND
174 K12 VDD_CORE VCC VDD for Core
175 K13 VDDS VCC VDDS
176 K14 VDDSHV5 VCC VDD for I/O
177 K15 UART4_TXD BIDIRECT UART Transmit Data
178 K16 RMII1_TXD1 BIDIRECT RMII Transmit Data
179 K17 RMII1_TXD0 BIDIRECT RMII Transmit Data
180 K18 UART2_RXD BIDIRECT UART Receive Data
181 L1 DDR_DQS1 BIDIRECT DDR DATA STROBE FOR DATA[15:8] (Differential+)
182 L2 DDR_DQSN1 BIDIRECT DDR DATA STROBE FOR DATA[15:8] (Differential-)
183 L3 DDR_D13 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
184 L4 DDR_D14 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
185 L5 VDDS_DDR VCC VDDS for DDR
186 L6 VDD_CORE VCC VDD for Core
187 L7 VDD_CORE VCC VDD for Core
188 L8 VDD_CORE VCC VDD for Core
189 L9 VDD_CORE VCC VDD for Core
190 L10 VSS GND GND
191 L11 VSS GND GND
192 L12 VSS GND GND
193 L13 VSS GND GND
194 L14 VDDSHV5 VCC VDD for I/O
195 L15 RMII1_RXD1 BIDIRECT RMII Receive Data
196 L16 UART3_TXD BIDIRECT UART Transmit Data
197 L17 UART3_RXD BIDIRECT UART Receive Data
198 L18 UART2_TXD BIDIRECT UART Transmit Data
199 M1 DDR_D15 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
200 M2 DDR_DQM0 O DDR WRITE ENABLE / DATA MASK FOR DATA[7:0]
201 M3 DDR_D0 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
202 M4 DDR_D1 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
203 M5 VPP NC (Not Used)
204 M6 VSS GND GND
205 M7 VSS GND GND
206 M8 VSS GND GND
207 M9 VSS GND GND
208 M10 VSS GND GND
209 M11 VDD_CORE VCC VDD for Core
210 M12 VSS GND GND
211 M13 VDD_CORE VCC VDD for Core
212 M14 VSSA_USB GND GND(for USB Analog)
213 M15 USB0_CE O USB0 Active high Charger Enable output(Not Used)
214 M16 RMII1_RXD0 BIDIRECT RMII Receive Data
215 M17 MDIO_DATA BIDIRECT MDIO Data
216 M18 MDIO_CLK O MDIO Clk
217 N1 DDR_D2 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
218 N2 DDR_D3 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
219 N3 DDR_D4 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
220 N4 DDR_D5 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
221 N5 VDDSHV6 VCC VDD for I/O
222 N6 VDDS VCC VDDS
223 N7 VSS GND GND
224 N8 VDD_CORE VCC VDD for Core
225 N9 VDD_CORE VCC VDD for Core
226 N10 VSS GND GND
227 N11 VSS GND GND
228 N12 VDD_CORE VCC VDD for Core
229 N13 VDD_CORE VCC VDD for Core
230 N14 VSSA_USB GND GND(for USB Analog)
231 N15 VDDA3P3V_USB0 VCC VDDA for USB0(3.3V)
232 N16 VDDA1P8V_USB0 VCC VDDA for USB0(1.8V)
233 N17 USB0_DP BIDIRECT USB0 Data plus
234 N18 USB0_DM BIDIRECT USB0 Data minus
235 P1 DDR_DQS0 BIDIRECT DDR DATA STROBE FOR DATA[7:0] (Differential+)
236 P2 DDR_DQSN0 BIDIRECT DDR DATA STROBE FOR DATA[7:0] (Differential-)
237 P3 DDR_D6 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
238 P4 DDR_D7 BIDIRECT DDR SDRAM DATA INPUT/OUTPUT
239 P5 VDDSHV6 VCC VDD for I/O
240 P6 VDDSHV6 VCC VDD for I/O
241 P7 VDDSHV1 VCC VDD for I/O
242 P8 VDDSHV1 VCC VDD for I/O
243 P9 VDDS VCC VDDS
PIN Outer
Function
NO.
No
244 P10
245 P11
246 P12
247 P13
248 P14
249 P15
250 P16
251 P17
252 P18
253 R1 LCD_DATA0 / SYSBOOT0 BIDIRECT LCD data bus/BOOT Mode Set
254 R2 LCD_DATA1 / SYSBOOT1 BIDIRECT LCD data bus/BOOT Mode Set
255 R3 LCD_DATA2 / SYSBOOT2 BIDIRECT LCD data bus/BOOT Mode Set
256 R4 LCD_DATA3 / SYSBOOT3 BIDIRECT LCD data bus/BOOT Mode Set
257 R5 LCD HSYNC/GPIO2[23] BIDIRECT GPIO
258 R6 LCD_AC_BIAS_EN BIDIRECT LCD AC bias enable chip select
259 R7
260 R8
261 R9
262 R10 VDDS_PLL_CORE_LCD VCC VDDS for LCD PLL
263 R11
264 R12
265 R13
266 R14
267 R15 VDDA3P3V_USB1 VCC VDDA for USB1(3.3V)
268 R16 VDDA1P8V_USB1 VCC VDDA for USB1(1.8V)
269 R17
270 R18
271 T1 LCD_DATA4 / SYSBOOT4 BIDIRECT LCD data bus/BOOT Mode Set
272 T2 LCD_DATA5 / SYSBOOT5 BIDIRECT LCD data bus/BOOT Mode Set
273 T3 LCD_DATA6 / SYSBOOT6 BIDIRECT LCD data bus/BOOT Mode Set
274 T4 LCD_DATA7 / SYSBOOT7 BIDIRECT LCD data bus/BOOT Mode Set
275 T5 LCD_DATA15 / SYSBOOT15 BIDIRECT LCD data bus/BOOT Mode Set
276 T6
277 T7
278 T8
279 T9
280 T10
281 T11
282 T12
283 T13
284 T14
285 T15
286 T16
287 T17
288 T18
289 U1 LCD_DATA8 / SYSBOOT8 BIDIRECT LCD data bus/BOOT Mode Set
290 U2 LCD_DATA9 / SYSBOOT9 BIDIRECT LCD data bus/BOOT Mode Set
291 U3 LCD_DATA10 / SYSBOOT10 BIDIRECT LCD data bus/BOOT Mode Set
292 U4 LCD_DATA11 / SYSBOOT11 BIDIRECT LCD data bus/BOOT Mode Set
293 U5 LCD VSYNC/GPIO2[22] BIDIRECT GPIO
294 U6
295 U7
296 U8
297 U9
298 U10
299 U11
300 U12
301 U13
302 U14
303 U15
304 U16
305 U17
306 U18
307 V1
308 V2 LCD_DATA12 / SYSBOOT12 BIDIRECT LCD data bus/BOOT Mode Set
309 V3 LCD_DATA13 / SYSBOOT13 BIDIRECT LCD data bus/BOOT Mode Set
310 V4 LCD_DATA14 / SYSBOOT14 BIDIRECT LCD data bus/BOOT Mode Set
311 V5
312 V6
313 V7
314 V8
315 V9
316 V10
317 V11
318 V12
319 V13
320 V14
321 V15
322 V16
323 V17
324 V18
Name I/O
VDDSHV2 VCC VDD for I/O
VDDSHV2 VCC VDD for I/O
VDDSHV3 VCC VDD for I/O
VDDSHV3 VCC VDD for I/O
VDDS VCC VDDS
USB0_VBUS I USB0 VBUS
USB0_ID I USB0 OTG ID
USB1_ID I USB1 OTG ID (Not Used)
USB1_CE O USB1 Active high Charger Enable output (Not Used)
GPIO2[2] BIDIRECT GPIO
MMC1_DAT2 BIDIRECT MMC/SD/SDIO Data Bus
GPIO1[6] BIDIRECT GPIO
VDDS_OSC VCC VDDS for OSC
GPIO1[13] BIDIRECT GPIO
GPIO1[16] BIDIRECT GPIO
GPIO1[20] BIDIRECT GPIO
USB1_DP BIDIRECT USB1 Data plus (Not Used)
USB1_DM BIDIRECT USB1 Data minus (Not Used)
GPIO2[5] BIDIRECT GPIO
GPIO2[3] BIDIRECT GPIO
MMC1_DAT3 BIDIRECT MMC/SD/SDIO Data Bus
GPIO1[7] BIDIRECT GPIO
GPIO0[23] BIDIRECT GPIO
GPIO0[26] BIDIRECT GPIO
GPIO1[12] BIDIRECT GPIO
GPIO2[0] BIDIRECT GPIO
GPIO1[19] BIDIRECT GPIO
GPIO1[23] BIDIRECT GPIO
GPIO1[26] BIDIRECT GPIO
GPIO0[30] BIDIRECT GPIO
USB1_VBUS I USB1 VBUS (Not Used)
GPIO2[4] BIDIRECT GPIO
MMC1_DAT0 BIDIRECT MMC/SD/SDIO Data Bus
GPIO1[4] BIDIRECT GPIO
MMC1_CLK BIDIRECT MMC/SD/SDIO Clock
GPIO0[22] BIDIRECT GPIO
OSC0_OUT O High frequency oscillator output
GPIO0[27] BIDIRECT GPIO
GPIO1[15] BIDIRECT GPIO
GPIO1[18] BIDIRECT GPIO
GPIO1[22] BIDIRECT GPIO
GPIO1[25] BIDIRECT GPIO
GPIO0[31] BIDIRECT GPIO
GPIO1[28] BIDIRECT GPIO
VSS GND GND
LCD_PCLK BIDIRECT LCD pixel clock
GPIO1[29] BIDIRECT GPIO
MMC1_DAT1 BIDIRECT MMC/SD/SDIO Data Bus
GPIO1[5] BIDIRECT GPIO
MMC1_CMD BIDIRECT MMC/SD/SDIO Command
OSC0_IN I High frequency oscillator input
VSS_OSC GND GND
GPIO2[1] BIDIRECT GPIO
GPIO1[14] BIDIRECT GPIO
GPIO1[17] BIDIRECT GPIO
GPIO1[21] BIDIRECT GPIO
GPIO1[24] BIDIRECT GPIO
GPIO1[27] BIDIRECT GPIO
VSS GND GND
TF5/TF3/TF1
Function
93