Commodore Amiga A500 Technical Reference Manual page 214

FUNCTION
DMAEN
DPLEN
COPEN
BLTEN
SPREN
DSKEN
AUD3EN
AUD2EN
AUD1
EN
AUDOEN
DESCRIPTION
Enable all
DMA
below.
Bit Plane DMA enable.
Copper
DMA
enable.
Blitter
DMA
enable.
Sprite
DMA
enable.
Disk
DMA
enable.
Audio channel
3 DMA
enable.
Audio channel
2 DMA
enable.
Audio channel 1
DMA
enable.
Audio channel 0
DMA
enable.
DSKPTH
Disk pointer (high 3 bits)
DSKPTL
Disk pointer (low 15 bits)
This pair of registers contains the 18-bit address of Disk DMA data.
These address registers must be initialized by the processor or Cop-
per before disk
DMA
is enabled.
REFPTR
Refresh pointer
This register is used as a Dynamic
RAM
refresh address generator. It
is writeable for test purposes only, and should never be written by
the microprocessor.
SPRxPTH
Sprite
X
pointer (high 3 bits)
SPRxPTL
Sprite
X
pointer (low 15 bits)
This pair of registers contains the 18-bit address of Sprite
X
(X =
0,1,2.3,4,5,6,7)
DMA
data. These address registers must be ini-
tialized by the processor or Copper every vertical blank time.
SPRxPOS
Sprite
X
vertical-horizontal position data
SPRxCTL
Sprite
X
vertical-horizontal
These 2 registers work together as position, size and feature Sprite
control registers. They are usually loaded by the Sprite DMA channel,
during horizontal blank; however, they may be loaded by either pro-
cessor any time.
SPRxPOS register:
BIT# SYM FUNCTION
15-08 SV7-SVO Start vertical value. High bit
(SV8)
is in
SPRxCTL reg. below.
07-00 SH8-SH1 Start horizontal value. Low bit (SHO) is in
SPRxCTL reg. below.
SPRxCTL register (writing this address disables sprite horizontal
comparator circuit):