Commodore Amiga A500 Technical Reference Manual page 211

COP1 LCH
Copper first location register (high 3 bits)
COP1 LCL Copper first location register (low 1 5 bits)
COP2LCH
Copper second location register (high 3
bits)
COPZLCL Copper second location register (low 1 5
bits)
COP1 NS
Copper instruction fetch identifL
This is a dummy address that is generated by the Copper whenever it
is loading instructions into its own instruction register. This actually
occurs every Copper cycle except for the second (IR2) cycle of the
MOVE instruction. The three types of instructions are shown below:
MOVE
Move immediate t o dest.
WAlT Wait until beam counter is equal to, or greater than
(keeps Copper off of bus until beam position has been
reached).
SKlP Skip i f beam counter is equal to, o r greater than
(skips following MOVE inst. unless beam position has
been reached).
MOVE WAIT UNTIL SKIP IF
BIT# IR1 IR2 IR1 IR2 IR1 IR2
1 5 X RD15
VP7 BFD
*
VP7 BFD
*
1 4
X RD14 VP6 VE6 VP6 VE6
1 3
X
RD13 VP5 VE5
VP5 VE5
1 2
X
RD12 VP4 VE4
VP4 VE4
11
X 'RD11 VP3 VE3 VP3 VE3
1 0 X RDlO VP2 VE2 VP2 VE2
09 X RD09 VP1 VE1 VP1 VE1
08
DA8
RD08 VPO VEO VPO VEO
07 DA7 RD07 HP8 HE6 HP8 HE6
06
DA6 RD06 HP7 HE7 HP7 HE7
05 DA5 RD05 HP6 HE6 HP6 HE6
0 4 DA4 RD04 HP5
HE5 HP5 HE5
03 DA3 RD03 HP4 HE4 HP4 HE4
0 2 DA2 RD02 HP3 HE3 HP3 HE3
0 1 DA1 RDOl HP2
HE2 HP2 HE2
00
0
RDOO 1 1 1 1
IR1
=
First instruction register
IR2
=
Second instruction register
D A
=
Destination Address for MOVE instruction. Fetched during
IR1 time, used during IR2 time on RGA bus.
RD
=
RAM data moved by MOVE instruction a t IR2 time directly
from RAM t o the address given by the DA field.
VP
=
Vertical Beam Position comparison bit
HP
=
Horizontal Beam Position comparison bit
VE
=
Enable comparison (mask bit)
HE
=
Enable comparison (mask bit)