Supero FatTwin F617R2-F73 User Manual page 115

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Chapter 7: BIOS
When set to Enabled, this feature uses Intel's DCA (Direct Cache Access)
Technology to improve data transfer effi ciency. The default setting is Enabled.
MMCFG BASE
This feature determines the lowest base address that can be assigned to
PCI devices. The lower the address, the less system memory is available
(for 32-bit OS). The higher the address, the less resources are allocated to
PCI devices. The options are 0x80000000, 0xA0000000, and 0xC0000000.
IIO 1 PCIe Port Bifurcation Control
This submenu confi gures the following IO PCIe Port Bifurcation Control
settings for the PCIe ports to determine how the available PCI-Express lanes
will be distributed between the PCI-Exp. Root Ports.
CPU 1 Slot1 PCI-E 3.0 x16 Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for Slot 1. Select GEN2
to enable PCI-Exp Generation 2 support for Slot 1. Select GEN3 to enable
PCI-Exp Generation 3 support for Slot 1. The options are GEN1, GEN2, and
GEN3.
IIO 2 PCIe Port Bifurcation Control
This submenu confi gures the following IO PCIe Port Bifurcation Control
settings for the PCIe ports to determine how the available PCI-Express lanes
will be distributed between the PCI-Exp. Root Ports.
CPU 2 Slot2 PCI-E 3.0 x16 Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for Slot 1. Select GEN2
to enable PCI-Exp Generation 2 support for Slot 1. Select GEN3 to enable
PCI-Exp Generation 3 support for Slot 1. The options are GEN1, GEN2, and
GEN3.
 QPI Confi guration
Current QPI Link Speed
This item displays the current status of the QPI Link.
Current QPI Link Frequency
This item displays the frequency of the QPI Link.
7-11

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