Epson TM-U950 Technical Manual page 79

CONFIDENTIAL
As print buffer for pattern data to be sent to the print head
As storage area for CPU processing functions (flags, pointers, etc.)
EEPROM
The EEPROM stores the slip paper insert sensor level. Data exchange with the CPU is performed
via a serial link.
Gate array
The gate array is a five I/O port type with an eight-bit (see Table 2-2). It serves two purposes. It
can be used by the CPU for I/O port expansion, as specified in the memory map (port expansion
function). When the ALE signal goes high, the gate array also latches to the multiplexed
address/data signal output by the CPU and extracts the address signal (address latch function).
Table 2-2. Gate Array Pin Assignments
Pin number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2-34 Mechanism Configuration and Operating Principles
Gate array function Signal designation`
(RSET) (RSET)
PA 0 HEAD 8
PA 1 HEAD 7
PA 2 HEAD 6
PC 6 JN_LED
PA 3 HEAD 5
PA 4 HEAD 4
PA 5 HEAD 3
PA 6 HEAD 2
PA 7 HEAD 1
GND -
PB 0 SW1I
PB 1 SW2I
PB 2 SWCK
PB 3 SWSL
PB 4 SCB
PB 5 S/J HL
PB 6 HD_COM
PB 7 HEAD 9
PC 0 E2DI
PC 1 E2DO
PC 2 E2CK
PC 3 E2CE
PC 4 IMDSR
I/O Level Description
I TTL Reset signal input L = reset
O TTL Print head 8 L = ON
O TTL Print head 7 L = ON
O TTL Print head 6 L = ON
O TTL Print head 5 L = ON
O TTL Print head 4 L = ON
O TTL Print head 3 L = ON
O TTL Print head 2 L = ON
O TTL Print head 1 L = ON
O TTL Print head 0 L = ON
- GND Power supply
I TTL DIP switch bank 1 serial input
I TTL DIP switch bank 1 serial input
I TTL DIP switch settings read clock
I TTL DIP switch bank select
O TTL S/J switching solenoid drive signal L = drive
O TTL S/J switching solenoid hold signal L = hold
O TTL Print head common L = ON
O TTL Print head L = ON
I TTL Data input from EEROM
O TTL Data output from EEROM
O TTL EEROM select output
O TTL EEROM select output
DSR signal input from the IM-403/405 serial
I TTL
interface (unused on the TM-U950P)
Rev. A