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Errata
96.
With TF (Trap Flag) Asserted, FP Instruction That Triggers an
Unmasked FP Exception May Take Single Step Trap before Retirement
of Instruction
Problem:
If an FP instruction generates an unmasked exception with the EFLAGS.TF=1, it is
possible for external events to occur, including a transition to a lower power state.
When resuming from the lower power state, it may be possible to take the single
step trap before the execution of the original FP instruction completes.
Implication: A Single Step trap will be taken when not expected.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
97.
BTS (Branch Trace Store) and PEBS (Precise Event Based Sampling)
May Update Memory outside the BTS/PEBS Buffer
Problem:
If the BTS/PEBS buffer is defined such that:
• The difference between BTS/PEBS buffer base and BTS/PEBS absolute maximum
is not an integer multiple of the corresponding record sizes
• BTS/PEBS absolute maximum is less than a record size from the end of the
virtual address space
• The record that would cross BTS/PEBS absolute maximum will also continue past
the end of the virtual address space
A BTS/PEBS record can be written that will wrap at the 4G boundary (IA32) or 2^64
boundary (EM64T mode), and write memory outside of the BTS/PEBS buffer.
Implication: Software that uses BTS/PEBS near the 4G boundary (IA32) or 2^64 boundary
(EM64T mode), and defines the buffer such that it does not hold an integer multiple
of records can update memory outside the BTS/PEBS buffer.
Workaround:
Define BTS/PEBS buffer such that BTS/PEBS absolute maximum minus BTS/PEBS
buffer base is integer multiple of the corresponding record sizes as recommended in
the IA-32 Intel
Status:
For the steppings affected, see the Summary Tables of Changes.
98.
Brand String Field Reports Incorrect Maximum Operating Frequency
on Intel
Problem:
Pentium 4 processor Extreme Edition with 1066 MHz FSB may report incorrect
maximum operating frequency when using CPUID Brand String Extension.
Implication: Due to this erratum, incorrect maximum operating frequency may be returned.
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
For the steppings affected, see the Summary Tables of Changes.
Specification Update
®
Architecture Software Developer's Manual, Volume 3.
®
®
Pentium
4 Extreme Edition Processor with 1066 MHz FSB
65
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