Bclk Waveform At Processor Pad And Pin; Fsb Common Clock Valid Delay Timing Waveform - Intel BFCBASE - Motherboard - 7300 Datasheet

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Figure 2-15. BCLK Waveform at Processor Pad and Pin
Notes:
1.
Waveform at pin is non-monotonic. Waveform at pad is monotonic.
2.
Differential Edge Rate (DER) measured zero +/- 200mv.
3.
g indicates V/ns units and meg indicates mv/ns units.
4.
Waveform at pad has faster edge rate than at pin.
Figure 2-16. FSB Common Clock Valid Delay Timing Waveform
Common Clock
Signal (@ driver)
Common Clock
Signal (@ receiver)
48
T0
BCLK1
BCLK0
T
P
valid
T
= T10: Common Clock Output Valid Delay
P
T
= T11: Common Clock Input Setup
Q
T
= T12: Common Clock Input Hold Time
R
Electrical Specifications
T1
valid
T
T
Q
R
valid
Document Number: 318080-002
T2

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