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Thermal Specifications
6.3
Platform Environment Control Interface (PECI)
6.3.1
Introduction
PECI offers an interface for thermal monitoring of Intel processor and chipset
components. It uses a single wire, thus alleviating routing congestion issues.
Figure 6-7
Processor 7200 Series and 7300 Series. PECI uses CRC checking on the host side to
ensure reliable transfers between the host and client devices. Also, data transfer
speeds across the PECI interface are negotiable within a wide range (2 Kbps to 2
Mbps). The PECI interface on Intel
disabled by default and must be enabled through BIOS.
Figure 6-7.
PECI Topology
Note:
The power-on configuration (POC) settings of third party chipsets may produce different PECI addresses
than those shown in
the correct PECI addresses.
6.3.1.1
T
CONTROL
Fan speed control solutions based on PECI utilize a T
processor IA32_TEMPERATURE_TARGET MSR. This MSR uses the same offset
temperature format as PECI, though it contains no sign bit. Thermal management
devices should infer the T
should utilize the relative temperature value delivered over PECI in conjunction with
the MSR value to control or optimize fan speeds.
control diagram using PECI temperatures.
Document Number: 318080-002
shows an example of the PECI topology in a system with Intel
P EC I H ost
C ontroller
Figure
6-7. Thermal designers should consult their third party chipset designers for
and Tcc Activation on PECI-Based Systems
CONTROL
®
®
Xeon
Processor 7200 Series and 7300 Series is
0
x
D om ain0
3
C 28
0
0
x
D om ain1
3
0
0
x
D om ain0
3
C 28
2
0
x
D om ain1
3
2
0
x
D om ain0
3
C 28
1
0
x
D om ain1
3
1
0
x
D om ain0
3
3
C 28
0
x
D om ain1
3
3
CONTROL
value as negative. Thermal management algorithms
Figure 6-8
®
®
Xeon
Socket 0
C luster ID[1:0] = 0
Socket 1
C luster ID[1:0] = 1
Socket 2
C luster ID[1:0] = 2
Socket 3
C luster ID[1:0] = 3
value stored in the
shows a conceptual fan
107
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