Bbus; Shemp; Larry - GE MAC 5500 Service Manual

BBus

Shemp

Larry

2-30
Equipment Overview: Theory of Operation

Run ChkShemp: If bit 4 of Port A is high, we are Shemp. At this point we are
either Shemp or Larry. Shemp has pull-up resistors on Port A so bit 4 should be
high. Larry on the other hand has uses Port A to drive a makeshift DAC. Since
Port A is not being driven at the moment, bit 4 will be pulled to low via the
common DAC resistor R315, which is grounded.

We must be Larry. At this point we have eliminated all other Stooges.
All three stooges (Moe, Larry and Shemp) communicate with the ATMEL CPU via
BBus connections. BBus is a single wire, half-duplex serial connection that places
minimal hardware requirements on the microcontroller while yielding respectable
bit transfer rates (~50KBps). A common set of BBus commands allow the ATMEL
CPU to access 128 bytes of RAM in each microcontroller. This dual port access
allows the ATMEL CPU to examine and modify internal variables in each controller
while code is executing. This ability is used to allow the unalterable HC05 code to
handle modest changes in hardware, such as changes in paper drive gearing or
battery pack capacity.
Similar in function to the ABus keyboard controller in Max-1 architecture machines,
Shemp scans the keyboard and queues key presses for the ATMEL CPU. Unlike
previous designs, key presses are reported both on press and release, allowing
system software to implement auto-repeat as well as the continuous operation of
treadmill control keys (up/down, faster/slower). A special key code indicates when
all keys are up as a safeguard against stuck keys in the application software.
Unlike previous keyboard encoder designs, Shemp does not provide dedicated scan
hardware for the shift and / or option keys. These keys are now located in the scan
matrix. Careful placement of keys in the scan matrix allows simultaneous depression
of the shift, option and other keys without interference.
Larry controls the paper drive motor and digitizes the analog inputs. The motor
control functions are virtually identical to those offered by the 78310 processor in
Max-1 architecture machines, with an expanded speed control range (down to zero).
Since Larry's code is not field-alterable, every motor control parameter is alterable
via BBus. Hopefully this renders the code immune to minor changes in the
printer drive train.
Motor Speed Control
Larry controls the motor speed by delivering a DAC controlled drive voltage to the
motor windings. The 6-bit DAC is implemented using discrete, binary-weighted
resistors directly driven by Larry's port pins. The DAC output voltage
(approximately 300mV full scale) is compared to a filtered fraction of the applied
DC motor voltage by comparator U61. If the motor feedback voltage is below the
DAC voltage, the comparator turns on the motor via an H-Bridge driver. One motor
terminal (which one is a function of motor direction) is always grounded. The other
is alternately driven to either 12V or ground. The duty cycle of the drive signal
determines the average applied voltage and therefore the average motor speed. The
feedback voltage signal is the average of both motor terminals (R274 and R275
MAC 5500 resting ECG analysis system
2020299-020
Revision E