Tod Fraction Alarm Register (Todfar; Watchdog Control Register (Wcr; Tod Seconds Alarm Register; Tod Fraction Alarm Register - Motorola M-CORE MMC2001 Series Reference Manual

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TODSAR — Time-of-Day Seconds Alarm Register
31
R
W
RESET:
C.3.6 TOD Fraction Alarm Register (TODFAR)
The time-of-day fraction alarm register is a 32-bit read/write register which holds eight
bits of data to be compared to the TOD fraction register. The comparison is made
every 1/256 of a second if the alarm function is enabled by the AE bit in the TODCSR.
This register is not affected by any of the reset conditions.
Access this register with 32-bit loads and stores only.
TODFAR — TOD Fraction Alarm Register
31
30
29
28
R

TOD FRACTION ALARM REGISTER

W
RESET:
Undefined on POR
15
14
13
12
R
0
0
0
W
RESET:
C.3.7 Watchdog Control Register (WCR)
This register contains fields that control the operation of the watchdog in different
modes of operation. The write-once bits can only be written once after a reset condi-
tion. Subsequent attempts to write to them will not affect the data previously written.
Access this register with 32-bit loads and stores only.
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.

TOD SECONDS ALARM REGISTER

Figure C-10 TOD Seconds Alarm Register
27
26
25
11
10
9
0
0
0
0
Figure C-11 TOD Fraction Alarm Register
PROGRAMMING REFERENCE
For More Information On This Product,
Go to: www.freescale.com
Unaffected
24
23
22
21
0
0
0
8
7
6
5
0
0
0
0
10001010
10001014
20
19
18
17
0
0
0
0
4
3
2
1
0
0
0
0
MOTOROLA
0
16
0
0
0
C-9

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