Motorola M-CORE MMC2001 Series Reference Manual page 236

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IRTS — Ignore RTS
Setting this bit forces the RTS input signal presented to the transmitter to always be
asserted, effectively causing the external pin to be ignored. In this mode, the RTS pin
can be used as a general-purpose input.
0 = Transmit only while RTS pin is asserted
1 = Ignore RTS pin
At reset, this bit is cleared to zero.
CTSC — CTS Pin Control
This bit controls the operation of the CTS output pin. While this bit is set, the CTS out-
put pin is controlled by the receiver. When the RX FIFO has a pending overrun, the
CTS output pin is negated to indicate to the far-end transmitter to stop transmitting.
While the CTSC bit is negated, the CTS output pin is controlled by the CTS bit.
On reset, since this bit is cleared to zero, the CTS pin is controlled by the CTS bit,
which is also cleared to zero on reset. This means that on reset the CTS signal is
negated.
0 = CTS pin controlled by the CTS bit
1 = CTS pin controlled by the receiver
At reset, this bit is cleared to zero.
CTS — CTS bit
This bit controls the CTS pin while the CTSC bit is negated. While CTSC is asserted
this bit has no function.
0 = CTS pin is driven high (inactive)
1 = CTS pin is driven low (active)
At reset, this bit is cleared to zero.
PREN — Parity Enable
This bit enables or disables the parity generator in the transmitter and parity checker
in the receiver.
0 = Parity disabled
1 = Parity enabled
At reset, this bit is cleared to zero.
PROE — Parity Odd/Even
This bit controls the sense of the parity generator and checker. When PROE is set,
odd parity is generated and expected. When PROE is cleared, even parity is gener-
ated and expected. This bit has no function if PREN is low.
0 = Even parity
1 = Odd parity
At reset, this bit is cleared to zero.
STPB — Stop Bits
This bit controls the number of stop bits transmitted after a character. When STPB is
set, two stop bits are sent. When STPB is cleared, one stop bit is sent. This bit has no
effect on the receiver, which expects one or more stop bits.
0 = One stop bit transmitted
1 = Two stop bits transmitted
At reset, this bit is cleared to zero.
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.
PROGRAMMING REFERENCE
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
C-41

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