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The value to be written into the ISPI control register is determined as follows:
• (Assume DOZE = 0)
• Assign SNS = 0 to force enable to active low.
• Assign SPI_EN = 1 to enable the pin
• Assign MSTR = 1
• Assign IRQ_EN = 1 to enable interrupts
• Assign PHA = 1
• Assign POL = 0
• Assign BAUD RATE = 4 to divide 16 MHz down to approximately 128 kHz per bit
• Assign CLOCK COUNT = 0xB to transfer 12 bits.
12.5.2 Slave Mode Example
In slave mode, the timing of transfers is dependent entirely on the external device. If
the transfer parameters for this example are identical to those in the manual mode
example above, then the ISPI is programmed in a two-step process:
1. Write ISPI register SPCR to 0x060B.
2. Write ISPI register SPDR to 0x0013.
SPCR is programmed differently from the manual mode example because:
• SPI_EN, SNS, and BAUD RATE are ignored in slave mode.
• MSTR has to be cleared to enable slave mode.
12.5.3 Interval Model Example
With a 16.38-MHz clock, HI_REFCLK = 61 ns. To program the ISPI to transfer 10-bit
words at 8-kHz intervals:
1. Program clock count to 0x9
2. Program baud rate to 0x3 (divide HI_REFCLK by 64)
3. Set SPI_EN, PHA, POL, and SNS as desired
4. Program interval count to 0x29F (671 decimal)
Per the equation:
Time_of_Interval = (HI_REFCLK_Period * 2 * (Interval_Count+2)) +
Time_of_Interval is then set to the following:
The ISPI interval timer begins as soon as written, following the transfer period. This
leaves approximately 1406 HI_REFCLK cycles before the Tx data register must be
re-written.
MOTOROLA
12-10
Freescale Semiconductor, Inc.
(HI_REFCLK_Period * Baud_Count * (Clock_Count +1))
61 * 2 * (671 + 2) + (61 * 64 * 11) = 125.05 µs.
INTERVAL MODE SERIAL PERIPHERAL INTERFACE
For More Information On This Product,
Go to: www.freescale.com
MMC2001
REFERENCE MANUAL
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