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C.3.2 Time-of-Day Control/Status Register (TODCSR)
TODCSR — Time-of-Day Control/Status Register
31
30
29
28
R
0
0
0
0
W
RESET:
15
14
13
12
R
0
0
0
0
W
RESET:
Access this register with 32-bit loads and stores only.
AE — Alarm Enable
This bit controls the function of the TOD alarm
0 = Alarm function is off to save power
1 = Alarm function is on
AIE — Alarm Interrupt Enable
This bit controls the alarm interrupt function
0 = AIF is inhibited from reaching the CPU
1 = AIF is allowed to request an interrupt
AIF — Alarm Interrupt Flag
This read-only bit is the alarm interrupt flag. It is cleared by writing to the TOD fraction
alarm register (TODFAR).
0 = No alarm interrupt is present
1 = Alarm interrupt is present
C.3.3 TOD Seconds Register (TODSR)
The time-of-day seconds register is a 32-bit read/write register that holds the number
of elapsed seconds. It is clocked by a 1-Hz signal generated as a carry from the TOD
fraction register. When TODSR is read, the content of the fraction counter is latched
into a holding buffer to be read later. This prevents a fraction rollover between reads
of the two registers from causing incorrect data to be read. When TODSR is written,
the TODFR is cleared to all zeros. TODSR is not affected by the watchdog reset or by
a reset initiated by the external reset signal, but is undefined after a POR.
Access this register with 32-bit loads and stores only.
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.
27
26
25
24
0
0
0
0
11
10
9
8
0
0
0
0
Figure C-7 TOD Control/Status Register
PROGRAMMING REFERENCE
For More Information On This Product,
Go to: www.freescale.com
23
22
21
20
0
0
0
0
7
6
5
4
0
0
0
0
10001004
19
18
17
16
0
0
0
0
3
2
1
0
0
AE
AIE
AIF
0
0
0
MOTOROLA
C-7
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