Siemens ET 200SP Manual page 58

Technology module tm pulse 2x24v
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Control bit/value
MODE_SLOT
LD_SLOT
DITHER
SET_DQA
SET_DQB
TM_CTRL_DQ
SW_ENABLE
RES_ERROR
Reserved
Technology Module TM Pulse 2x24V (6ES7138‑6DB00‑0BB1)
Manual, 05/2019, A5E35061186-AB
Explanations
You specify whether you want to apply a change in SLOT once or cyclically with this bit.
0 means: As soon as you write the respective value in the corresponding output byte, the value
from SLOT is applied once and kept until the next change. A change via SLOT takes effect at
the next output sequence. After a restart of the module, the value is overwritten with the value
set in the hardware configuration.
1 means: When you write the respective value in the corresponding output byte, the current
value from SLOT in each case is applied cyclically. A change via SLOT takes effect at the next
output sequence.
You specify the meaning of the value in SLOT with this load request:
0000
means: No action, idle
B
0001
means: Period duration in μs
B
0010
means: On delay in μs
B
0101
means: Dithering ramp up (LOWWORD), ramp down (HIGHWORD) in ms
B
0110
means: Dithering amplitude in %
B
0111
means: Dithering period duration in μs
B
Values not listed are invalid and trigger setting of feedback bit ERR_LD (when MODE_SLOT =
0) or ERR_SLOT_VAL (when MODE_SLOT = 1).
You activate the superimposition of the dither signal on the PWM signal with this bit.
0 → 1 means: Dithering starts with the configured ramp up
1 → 0 means: Dithering ends with the configured ramp down
You use this bit to set digital output DQn.A when TM_CTRL_DQ and SET_DQB are set to 0.
You use this bit to set digital output DQn.B when TM_CTRL_DQ and SET_DQA are set to 0.
You enable the technological function of the digital output with this bit.
0 means: SET_DQA and SET_DQB define states of DQn.A and DQn.B
1 means: Output sequence defines the state of DQn.A; DQn.B is always 0.
You activate the software enable with this bit. If you are using the hardware enable, it is com-
bined with the software enable.
0 means: Stop output
1 means: Start output
Use of the HW enable is activated through parameter assignment. The HW enable is controlled
externally using the digital input DIn.0.
You use this bit to reset the following feedback bits when errors are pending:
ERR_24V
ERR_DQA
ERR_DQB
ERR_LD
Reserved bits must be set to 0.
Configuring/address space
4.2 Pulse width modulation PWM mode
57

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