Siemens ET 200SP Manual page 23

Configuring/address space
4.1 Pulse output (single pulse) mode
Pulse diagram
The following figure shows an example of an output sequence when DIn.0 is being used as a
hardware enable.
Figure 4-1 Example of an output sequence
If you are using the hardware enable, it is combined with the software enable. When the
software enable is active, the output sequence starts at the first positive edge of the
hardware enable. Additional positive edges of the hardware enable during the output
sequence are ignored. If the hardware enable is set and remains set for the duration of the
input delay, the On delay is started and the STS_ENABLE feedback bit is set. As soon as
the On delay has elapsed, the pulse is output with the assigned pulse duration at the
respective digital output DQn.A. The output sequence is stopped at the end of the pulse
duration, and STS_ENABLE is reset.
If you are not using a hardware enable, the On delay starts at the positive edge of
SW_ENABLE.
Aborting the output sequence
If you reset the SW_ENABLE control bit, the software enable is deactivated and the current
output sequence is aborted and not completed. The STS_ENABLE feedback bit and the
digital output DQn.A are reset.
A renewed pulse output is only possible after a restart of the output sequence.
22
Technology Module TM Pulse 2x24V (6ES7138‑6DB00‑0BB1)
Manual, 05/2019, A5E35061186-AB