Table of Contents
Advertisement
False arbitration, 2-7, 2-14
Fatal Data Transmit Check Error bit, 7-8
Fatal No Acknowledge Error bit, 7-10
Fault Disable bit, 7-52
FAULT_DIS, 7-52
FBANK, 7-25
FCAPE, 7-101
FCMD, 7-25
FDBE, 7-48
FDDI registers, 7-142
FDE<3:0>, 7-48
FDTCE, 7-8
Fixed high mode, 6-33
Fixed low mode, 6-33
Flash ROMs, 3-4
Flow control, 3-10
FNAE, 7-10
Force Bank Busy Error bit, 7-123
Force Column Address Par Err bit, 7-101
Force CSR Bus Addr Par Err bit, 7-135
Force CSR Bus Data Par Err bit, 7-135
Force data error bit, 7-48
Force Data Status Error bit, 7-124
Force Data Timeout Error bit, 7-124
Force Down Data Par Err bit, 7-135
Force Down EOP Sequence Error bit, 7-134
Force Down Valid Sequence Err bit, 7-135
Force ECC<7:0> bits, 7-135
Force IDP CMD Par Err bit, 7-123
Force IDP CSR Bus Par Err bit, 7-124
Force Ignore bit, 7-48, 7-49
Force Row Address Par Err bit, 7-101
FPROM_WE, 7-81
FRAPE, 7-101
FRC_BNK_BSY, 7-123
FRC_CSR_BUS_APE, 7-135
FRC_CSR_BUS_DPE, 7-135
FRC_DN_DPE, 7-135
FRC_DSE, 7-124
FRC_DTO, 7-124
FRC_ECC<7:0>, 7-135
FRC_EOP_SEQ_ERR, 7-134
FRC_IDP_CMD_PE, 7-123
FRC_IDP_CSR_BUS_PE, 7-124
FRC_VAL_SEQ_ERR, 7-135
Free Run bit, 7-100
FRIGN, 7-48, 7-49
FRUN, 7-100
FSTR, 7-96, 7-97
G
GBTO, 7-58
Gbus, 1-4
Gbus map, 3-9
Gbus registers, 7-46
Index-6
Gbus Slow bit, 7-47
Gbus space, 3-9
Gbus Timeout Error bit, 7-58
GBUS$LED register, 7-78
GBUS$MISCR register, 7-79
GBUS$MISCW register, 7-81
GBUS$SERNUM register, 7-83
GBUS$TLSBRST register, 7-82
GBUS$WHAMI register, 7-77
GSLOW, 7-47
H
HALT, 7-66
Halt bit, 7-66
Halt CPU A bit, 7-15
Halt CPU B bit, 7-15
HALT_A, 7-15
HALT_B, 7-15
HALT_ENA, 7-64
Hardware Revision field, 7-5
Hard internal I/O port errors, 6-66
Hard I/O port errors, 6-75
Hard TLSB errors, I/O port, 6-66
HDP Loopback Enable bit, 7-139
HDP_LPBCK_EN, 7-139
HOSE, 3-12, 7-33
Hose, 6-35
HOSEn Cable OK bit, 7-131
HOSEn Error bit, 7-132
HOSEn Power OK bit, 7-132
HOSEn Power OK Transitioned bit, 7-131
HOSEn Reset bit, 7-129
HOSEn_CBLOK, 7-131
HOSEn_ERR, 7-132
HOSEn_PWROK, 7-132
HOSEn_PWROK_TR, 7-131
HOSEn_RESET, 7-129
Hose control logic, 6-82
Hose errors, 6-65
Hose interface, 6-35
Hose packet specifications, 6-39
Hose protocol, 6-35
Hose signals, 6-37
Hose status change errors, 6-78
Hose status signals, 6-40
HPC gate arrays, 6-82
HWREV, 7-5
I
IBOXTO, 7-55
Ibox Timeout bits, 7-55
IBR register, 7-140
ICCDR register, 7-122
ICCMSR register, 7-112
ICCMTR register, 7-125
Advertisement
Table of Contents
