DEC AlphaServer 8200 Technical Manual page 224

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Table 7-3 TLDEV Register Bit Definitions (Continued)
Name
Bit(s)
<15:0>
DTYPE
7-6 System Registers
Type
Function
R/W, 0
Device Type. Identifies the type of node as fol-
lows: bit <15> specifies a CPU node; bit <14>
specifies a memory node; bit <13> specifies an
I/O node. Bits <7:0> specify the ID of a node
type. The following table defines the current
TLSB device types.
Device
KFTHA
KFTIA
MS7CC
Single DECchip 21164
processor,
4-Mbyte cache
Single DECchip 21164
processor,
16-Mbyte cache
Dual DECchip 21164
processor, 4-Mbyte
cache
Dual DECchip 21164
processor, 16-Mbyte
cache
<DTYPE>
(Hex)
Module
2000
I/O port
2020
I/O port
5000
Memory
8011
CPU
8012
CPU
8014
CPU
8015
CPU

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