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Data return format, 2-19
Data status errors, 2-41, 6-73
Data Status Error bit, 7-8
Data Syndrome 0 bit, 7-9
Data Syndrome 1 bit, 7-9
Data Syndrome 2 bit, 7-9
Data Syndrome 3 bit, 7-9
Data Timeout bit, 7-8
Data Transmitter During Error bit, 7-8
Data Transmit Disable bit, 7-17
Data Valid Transmit Check Error bit, 7-27
Data wrapping, 2-20
DCTCE, 7-8
DDR register, 7-106
DECchip 21164A
features, 3-2
overview, 1-3
Decrement queue counter, 3-11
DEDA, 7-99
DEFAULT, 7-91
Default interleave, 4-15
Default Power Up State bit, 7-91
Demand-paged memory management unit, 3-2
Dense address mapping, 6-37
Dense address space transactions, 6-20
Dense address space write data, 6-22
Dense space reads and writes, 3-13
Dense window read command packet, 6-47,
6-48, 6-49
Dense window read data, 6-22
Dense window read data return packet, 6-62,
6-63
Dense window write command packet, 6-47,
6-50, 6-51
Destination Address bits, 7-76
DEST_ADR<38:9>, 7-76
Device register, 7-5
Device Type field, 7-6
DFLP, 7-107
Diagnostics, 1-7
Diagnostic Setup register, 7-47
DIGA Comm. Test registers, 7-69
DIGA Error register, 7-57
DIGA gate array, 3-3
DIGA to DIGA CSR Par Err #0, 7-58
DIGA to DIGA CSR Par Err #1, 7-60
DIGA to DIGA CSR Par Err #2, 7-60
DIGA to DIGA CSR Par Err #3, 7-60
DIGA to MMG CSR Par Err bit, 7-61
DIGA0 to ADG CSR Parity Error bit, 7-55
Digital UNIX, 1-7
Directing interrupts, TLCPUMASK, 8-4
Directing interrupts, TLINTRMASK, 8-4
Directly addressable console hardware, 3-5
Disable byte mask, 7-33
Disable Down Hose Reset bit, 7-134
Index-4
Disable Refresh bit, 7-98
Disable TLSB Command Transmission bit,
7-124
Disable TLSB Fault bit, 7-124
Distributed arbitration, 2-12
DIS_DN_HOSE_RST, 7-134
DIS_TLSB_CMD, 7-124
DIS_TLSB_FLT, 7-124
DMA masked write packet, 6-57, 6-58
DMA masked write packet sizes, 6-58
DMA masked write request, 6-12
DMA masked write transactions, 6-26
DMA masked write with data, 6-57
DMA read, 6-54
DMA read data return packet, 6-42
DMA read data return packet description, 6-43
DMA read data return packet with errors,
6-43, 6-44
DMA read data return packet with errors
description, 6-44
DMA read packet, 6-54, 6-55
DMA read packet sizes, 6-55
DMA read transactions, 6-10, 6-24
DMA transactions, 6-24, 6-83
DMA unmasked write, 6-12
DMA unmasked write packet description, 6-60
DMA unmasked write transactions, 6-26
DMA unmasked write with data, 6-59
DMA write transactions, 6-11
DMA interlock read transactions, 6-10
DM Size bit, 7-74
DM_CMD, 7-74
DM_CMD_VALID, 7-73
DM_DONE, 7-73
DM_1KB, 7-74
DM_2KB, 7-74
DM_4KB, 7-74
DM_512B, 7-74
DM_8KB, 7-74
DN_VRTX_ERR, 7-119
DON, 7-34
Done, 7-34
Double-bit ECC errors, 2-40, 6-72
Down Hose, 6-35
Down Hose packet specifications, 6-39
Down Hose signals, 6-38
Down Turbo Vortex errors, 6-76
Down Vortex Error bits, 7-119
DRAM arrays, 4-12
DRAM control, 5-4
DRAM Timing Rate bits, 7-43, 7-92
DRAM type, 7-105
DRAM Type bit, 7-92
DRFSH, 7-98
Drive Console Winner bit, 7-81
Drive Run bit, 7-81
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