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Table 7-5 TLCNR Register Bit Definitions (Continued)
Name
Bit(s)
<13>
STF_B
STF_A
<12>
7-16 System Registers
Type
Function
R/W, 1
Self-Test Fail B. When set, indicates that unit
has not yet passed self-test.
CPU: When set, indicates that CPU1 has not yet
passed self-test. Initialized to zero for uniproces-
sor module.
Memory: When set, indicates that memory has
not yet completed self-test. Memory clears this
bit if self-test executes to completion regardless
of whether or not errors were found within
the DRAM array. When this bit is clear, the
self-test LED will be lit, indicating that the mod-
ule completed the self-test. <STF_B> and
<STF_A> are set and cleared simultaneously.
I/O: Not implemented.
R/W, 1
Self-Test Fail A. When set, indicates that unit
has not yet passed self-test.
CPU: When set, indicates that CPU0 has not yet
passed self-test.
Memory: When set, indicates that memory has
not yet completed self-test. Memory clears this
bit if self-test executes to completion regardless
of errors (if any) found within the DRAM
array. When this bit is clear, the self-test LED
will be lit, indicating that the module completed
the self-test. <STF_A> and <STF_B> are set
and cleared simultaneously.
I/O: When set, indicates that I/O port has not
yet passed self-test. There is no on-board self-
test for the I/O port. The self-test is performed
by the CPUs. If self-test is successful, primary
CPU clears this bit.
The state of this bit also affects the I/O port's
green LED. When this bit is set, the LED will
not be lit. When this bit is clear, the LED will be
lit.
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