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Table 7-43 MCR Register Bit Definitions (Continued)
Name
Bit(s)
<9>
OPTION
<8>
SHRD
RSVD
<7>
<6>
DEFAULT
1 Value loaded into register at system initialization/reset through manufacturing installed jumpers on the module.
Type
Function
1
R, X
Option Installed. This field specifies whether
the SRAM option or the DRAM option is in-
stalled. When read as a value of zero, the SRAM
is installed. The SRAM option is used to support
NVRAM (nonvolatile memory). When this mode
is selected, refresh and self-test are inhibited
from being executed.
Option
0
1
R/W, 0
Shared. When set, and when the SRAM option
(DRAM = 0) is selected, causes assertion of
TLSB_SHARED whenever this module is read or
written in memory space.
R0
Reserved. Read as zero.
R, 1
Default Power-Up State. When set, indicates
that the memory's DRAM timing rate and re-
fresh rate are set to the default power-up or re-
set values. Writing the <DTR> field to any
value clears this bit. This bit is normally set on
power-up or reset.
Memory Option
70 ns SRAMs
60 ns DRAMs (default)
System Registers 7-91
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