Buffer Memory Address Comparison - Mitsubishi Electric MELSEC L Series Manual

6
HIGH-SPEED COUNTER MODULE REPLACEMENT

6.2.4 Buffer memory address comparison

Sequence programs need to be changed because the buffer memory address assignment differs.
For details of the buffer memory areas and sequence programs, refer to the MELSEC-L High-Speed
Counter Module User's Manual.
When the built-in I/O functions of the LCPU are used, the special register is used. For details, refer to
the MELSEC-L CPU Module User's Manual (Built-in I/O Function).
A1SD61
Address
Name
(decimal)
0
Present value
1
2
Counter function selection count value
3
4 Pulse input mode setting
5 Counter function selection setting
6
Preset value setting
7
8
Ring counter value setting
9
10 Sampling/periodic time setting
11 Write data error code
12
CH1 limit switch output data setting
28
29
CH2 limit switch output data setting
45
46
CH3 limit switch output data setting
62
63
CH4 limit switch output data setting
79
80
CH5 limit switch output data setting
96
97
CH6 limit switch output data setting
113
114
CH7 limit switch output data setting
130
131
CH8 limit switch output data setting
147
6
- 12
Address
(decimal)
Read/write
CH1 CH2
(L) 0 32
Preset value
(H) 1 33
R
(L) 2 34
Present value
(H) 3 35
4 36
Coincidence output point No.1
5 37
(L) 6 38
Coincidence output point No.2
(H) 7 39
R/W
(L) 8 40 Overflow detection
(H) 9 41 Counter function selection
10 42 Sampling/periodic time setting
11 43 Sampling/periodic counter flag
12 44
Latch count value
13 45
14 46
Sampling count value
15 47
16 48
Periodic pulse count, previous value
17 49
18 50
Periodic pulse count, present value
19 51
20 52
Ring counter lower limit
21 53
22 54
Ring counter upper limit
23 55
R/W
24 56
System area (Use prohibited)
31 63
LD62
Name Read/write
(L)
R/W
(H)
(L)
R
(H)
(L)
(H)
R/W
(L)
(H)
R
R/W
(L)
(H)
(L)
(H) R
(L)
(H)
(L)
(H)
(L)
(H)
R/W
(L)
(H)
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