A/D Conversion Completed Flag (Buffer Memory Address 10: Un\G10); Ch Digital Output Value (16Bit) (Buffer Memory Addresses 11 To 14: Un\G11 To Un\G14) - Mitsubishi Q64AD-GH User Manual

Melsec-q series, programmable logic controller, channel isolated high resolution analog-digital converter module with signal conditioning function
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3 SPECIFICATIONS

3.4.6 A/D conversion completed flag (buffer memory address 10: Un\G10)

Example
When all conversions of channels 1 and 2 enabled for A/D conversion are completed,
0003
3.4.7 CH
digital output value (16bit) (buffer memory addresses 11 to 14: Un\G11 to
Un\G14)
3 - 39
(1) When A/D conversion for the channels enabled for conversion is complete, the
A/D conversion completed flag is set to 1.
The A/D conversion completed flag (XE) is set to ON when the conversion for all
A/D conversion enabled channels is complete.
(2) When the operating condition setting request (Y9) is set to ON, the flag returns to
the default setting of 0 and changes to 1 when A/D conversion is complete.
b15 b14 b13 b12 b11 b10
0
0
0
For Q64AD-GH, information of b4 to b15 is fixed at 0.
For Q62AD-DGH, information of b2 to b15 is fixed at 0.
(3) is stored into the buffer memory address 10 (Un\G10).
H
b15
b14 b13 b12 b11 b10
0
0
0
0
0
0
(1) The value in the digital output value (32bit) (buffer memory addresses 54 to 61:
Un\G54 to Un\G61) is converted and the result of conversion is stored in 16-bit
signed binary.
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Signed bit
1: Negative
0: Positive
b9
b8
0
0
0
0
0
b9
b8
b7
b6
0
0
0
0
0
0
0
Data section
MELSEC-Q
b7
b6
b5
b4
b3
0
0
0
0
CH4 CH3 CH2 CH1
1 : A/D conversion completed
0 : A/D conversion in
progress or not used
b5
b4
b3
b2
b1
0
0
0
0
1
CH4 CH3 CH2 CH1
3
b2
b1
b0
b0
1
0003
(3)
H
3 - 39

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