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R
the device to upcoming configuration data and aligns the configuration data with the
internal configuration logic. Any data on the configuration input pins prior to
synchronization is ignored.
Synchronization is transparent to most users because all configuration bitstreams (.bit
files) generated by the Xilinx ISE® Bitstream Generator (BitGen) software include the
synchronization word.
Table 1-5: Signals Relating to Synchronization
Check Device ID (Step 5)
Once the device is synchronized, a device ID check must pass before the configuration data
frames can be loaded. This prevents an attempted configuration with a bitstream that is
formatted for a different device.
For example, the device ID check should prevent an XC4VLX15 from being configured
with an XC4VLX80 bitstream.
The device ID check is built into the bitstream, making this step transparent to most
designers.
the Virtex-4 device IDs, and
device ID check is performed through commands in the bitstream to the configuration
logic, not through the JTAG IDCODE register in this case.
Table 1-6: Virtex-4 Device ID Codes
Virtex-4 FPGA Configuration User Guide
UG071 (v1.12) June 2, 2017
Table 1-5
Signal Name
Type
DALIGN
Status
1
2
Clear
Device
Sample Mode
Configuration
Power-Up
Memory
Start
Figure 1-7: Check Device ID (Step 5)
Figure 1-7
shows the relative position of the device ID check,
Device
IDCODE
XC4VLX15
01658093
XC4VLX25
0167C093
XC4VLX40
016A4093
XC4VLX60
016B4093
XC4VLX80
016D8093
XC4VLX100
01700093
XC4VLX160
01718093
www.xilinx.com
shows signals relating to synchronization.
Access
Only available through the
SelectMAP interface during an
ABORT. (See
"Configuration
Abort Sequence Description,"
page
49.)
Steps
3
4
5
Device ID
Synchronization
Pins
Check
Bitstream
Table 1-7
shows the signals relating to the device ID check. The
Device
IDCODE
XC4VSX25
02068093
XC4VSX35
02088093
XC4VSX55
020B0093
Bitstream Loading (Steps 4-7)
Description
Indicates whether device
is synchronized.
6
7
Load
CRC Check
Configuration
Data
Loading
Table 1-6
Device
IDCODE
XC4VFX12
01E58093
XC4VFX20
01E64093
XC4VFX40
01E8C093
XC4VFX60
01EB4093
XC4VFX100
01EE4093
XC4VFX140
01F14093
8
Startup
Sequence
Finish
ug071_07_122105
shows
(1)
19
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