Spartan-7 Device Configuration - Xilinx SP701 User Manual

Table 5: Default Switch Settings
Callout Switch
15 SW2
21 SW10
21 SW12
26 SW13

Spartan-7 Device Configuration

The SP701 board supports two of the 7 series FPGA configuration modes:
• Master SPI flash memory using the onboard QSPI flash memory
• JTAG
J5 micro-AB USB-JTAG interface connector
○
- USB A-to-micro-B PC to SP701 cable connection
J3 2x7 2 mm keyed JTAG pod flat cable header
○
- Platform cable USB II/Parallel cable IV type connection
Each configuration interface corresponds to one or more configuration modes and bus widths as
listed in the following table.
The mode switches M2, M1, and M0 are on SW13 positions 4, 3, and 2, respectively.
Table 6: SP701 Board FPGA Configuration Modes
Master SPI
JTAG (default)
See Table 5, callout 26 SW13 for more information on the switch position.
UG1319 (v1.0) July 12, 2019
SP701 Board User Guide
Type
5-pole DIP MSP430 U25 GPIO
8-pole FPGA U1 GPIO
8-pole FPGA U1 GPIO
FPGA U1 Configuration:
Switch OFF = 1 = High; ON = 0 = Low
Mode = SW13[4:2] = Mode[2:0]
JTAG: SW13[4:2] = OFF, ON, OFF =
4-pole DIP
Mode[101]
MASTER SPI: SW13[4:2] = ON, ON, OFF =
Mode[001]
SW13[1] = INIT_B, OFF = OPEN, ON = 0 =
Low
Configuration Mode
Chapter 2: Board Setup and Configuration
Function
OFF, OFF, OFF, OFF,
OFF, ON, OFF=101
SW13 Switch Settings M[2:0]
Send Feedback
Schematic
Default Page
Number
19
OFF
All OFF 21
All OFF 21
3
OFF
001
101
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