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Chapter 3:
Boundary-Scan and JTAG Configuration
Table 3-1: Virtex-4 TAP Controller Pins
Notes:
1. As specified by the IEEE Standard, the TMS and TDI pins both have internal pull-up resistors. These
For JTAG configuration mode, JTAG inputs use the V
58
Pin
TDI
Test Data In. This pin is the serial input to all JTAG instruction and data registers.
The state of the TAP controller and the current instruction determine the register that
is fed by the TDI pin for a specific operation. TDI has an internal resistive pull-up to
provide a logic High to the system if the pin is not driven. TDI is applied into the JTAG
registers on the rising edge of TCK.
TDO
Test Data Out. This pin is the serial output for all JTAG instruction and data registers.
The state of the TAP controller and the current instruction determine the register
(instruction or data) that feeds TDO for a specific operation. TDO changes state on the
falling edge of TCK and is only active during the shifting of instructions or data
through the device. TDO is an active driver output.
TMS
Test Mode Select. This pin determines the sequence of states through the TAP
controller on the rising edge of TCK.
TMS has an internal resistive pull-up to provide a logic High if the pin is not driven.
TCK
Test Clock. This pin is the JTAG Test Clock.
TCK sequences the TAP controller and the JTAG registers in the Virtex-4 devices.
internal pull-up resistors of 50-150 kΩ are active, regardless of the mode selected.
IEEE Standard 1149.1 Compliant Device
Select Next State
TMS
TCK
TDI
I/O
Figure 3-1: Typical JTAG Architecture
www.xilinx.com
Description
TAP State Machine
Test-Logic-Reset
1
0
1
1
Run-Test/Idle
Select-DR
Select-IR
0
0
0
1
1
Capture-DR
Capture-IR
0
0
Shift-DR
Shift-IR
0
0
1
1
1
1
Exit1-DR
Exit1-IR
0
0
Pause-DR
Pause-IR
0
0
1
1
Exit2-DR
Exit2-IR
0
0
1
1
Update-DR
Update-IR
1
1
0
0
Instruction Register
Instruction Decoder
Bypass[1] Register
IDCODE[32] Register
Boundary-Scan[N] Register
I/O
I/O
Virtex-4 FPGA Configuration User Guide
Shift-IR/Shift-DR
Select Data
Register
I/O
supply.
CCO_CFG
UG071 (v1.12) June 2, 2017
R
TDO
UG071_47_042704
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