3.1
Pixel Format Image
The following figure shows the relationship between the input signal and LCD
pixel format.
3.2
Signal Description
Table 3.1: Symbol Description
Pin No.
Symbol
1
VDD
2
VDD
3
UD
4
LR
5
RxIN1-
6
RxIN1+
7
GND
8
RxIN2-
9
RxIN2+
10
GND
11
RxIN3-
12
RxIN3+
13
GND
14
RxCLKIN-
15
RxCLKIN+
16
GND
17
SEL68
18
NC
19
RxIN4-
20
RxIN4+
IDK-2108 User Manual
Description
Power Supply, 3.3V (typical)
Power Supply, 3.3V (typical)
Vertical Reverse Scan Control. Low or NC -> Normal mode,
Height -> Vertical Reverse Scan (Note)
Horizontal Reverse Scan Control. Low or NC -> Normal mode,
Height -> Vertical Reverse Scan (Note)
LVDS differential data input Pair 0
Ground
LVDS differential data input Pair 1
Ground
LVDS differential data input Pair 2
Ground
LVDS differential Colock input Pair
Ground
LVDS 6/8 bit select function control, Low or NC 6 Bit Input Mode.
High 8-bit Input Mode (Node)
NC
LVDS differential data input Pair 3. Must be connected to Ground
in 6-bit input mode.
10