Advantech IDK-2108 Series User Manual page 20

Signal Name
R7
R6
R5
R4
R3
R2
R1
R0
G7
G6
G5
G4
G3
G2
G1
G0
B7
B6
B5
B4
B3
B2
B1
B0
RxCLKIN
DE
VS
HS
Note: Output signals from any system shall be Low or Hi-Z state when VDD is off.
Power Supply VDD
LVDS Signal
Backlight On
IDK-2108 User Manual
Description Remarks
Red Data 7
Red Data 6
Red Data 5
Red Data 4
Red-pixel Data, For 8-bit LVDS input, MSB: R5;
LSB:R0
Red Data 3
Red Data 2
Red Data 1
Red Data 0
Green Data 7
Green Data 6
Green Data 5
Green Data 4
Green-pixel Data, For 8-bit LVDS input, MSB:
G7; LSB:G0
Green Data 3
Green Data 2
Green Data 1
Green Data 0
Blue Data 7
Blue Data 6
Blue Data 5
Blue Data 4
Blue-pixel Data, For 8-bit LVDS input, MSB: B7;
LSB:B0
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0
LVDS Data Clock
Data Enable Signal When the signal is high, the pixel data is valid to
be displayed.
Vertical Synchronous
Signal
Horizontal Synchro-
nous Signal
T1
90%
10%
T2
T3
12
90%
T6
T5
VALID
DATA
T4
10%
T7