3.1
Pixel Format Image
Following figure shows the relationship between input signal and LCD pixel
format.
768th
3.2
Pin Description
LVDS is a differential signal technology for LCD interface and high speed data trans-
fer device. The connector pin definition is as below.
Table 3.1: Pin Description
Pin No.
Symbol
1
VCC
2
VCC
3
VCC
4
GND
5
GND
6
GND
7
RPFI
8
NC
9
NC
10
NC
11
SEL 6/8
12
GND
13
NC
14
GND
15
RX0-
16
RX0+
17
GND
18
RX1-
IDK-1110P User Manual
Description
Power supply: +3.3 V
Power supply: +3.3 V
Power supply: +3.3 V
Ground
Ground
Ground
Reverse Panel Function (Display Rotation)
No Connection
No Connection
No Connection
LVDS 6/8 bit select function control,
Low or NC -> 8bit Input Mode
High -> 6bit Input Mode
Ground
No Connection
Ground
Negative transmission data of pixel 0
Positive transmission data of pixel 0
Ground
Negative transmission data of pixel 1
10
1023
1024
Note