3.1
Pixel Format Image
The following figure shows the relationship between input signal and LCD
pixel format.
3.2
Signal Description
Table 3.1: Symbol Description
Pin No.
Symbol
1
VDD
2
VDD
3
GND
4
SEL68
5
RIN0-
6
RIN0+
7
GND
8
RIN1-
9
RIN1+
10
GND
11
RIN2-
12
RIN2+
13
GND
14
CLKIN-
15
CLKIN+
16
GND
17
RIN3-
18
RIN3+
19
RSV
20
NC/GND
Note1 Input Signals shall be in low status when VDD is off.
Note2 High stands for "3.3V", Low stands for "0V", NC stands for "No Connection".
Note3 RSV stands for "Reserved".
IDK-2112 User Manual
Description
Power Supply, 3.3V (typical)
Power Supply, 3.3V (typical)
Ground
6/ 8bits LVDS data input selection [H: 8bits L/NC: 6bit]
LVDS receiver signal channel 0
LVDS Differential Data Input (R0, R1, R2, R3, R4, R5, G0)
Ground
LVDS receiver signal channel 1
LVDS Differential Data Input (G1, G2, G3, G4, G5, B0, B1)
Ground
LVDS receiver signal channel 2
LVDS Differential Data Input (B2, B3, B4, B5, HS, VS, DE)
Ground
LVDS receiver signal clock
Ground
LVDS receiver signal channel 3, NC for 6 bit LVDS Input
LVDS Differential Data Input (R6, R7, G6, G7, B6, B7, RSV)
Reverse Scan Function [H: Enable; L/NC: Disable]
Reserved for AUO internal test. Please treat it as NC.
12