Pixel Format Image; Pin Description - Advantech IDK-2110R XGA Series User Manual

3.1

Pixel Format Image

The following figure shows the relationship between the input signal and LCD
pixel format.
3.2

Pin Description

LVDS is a differential signal technology for LCD interface and high speed data trans-
fer devices. The connector pin definition is as below.
Note "Low" stands for 0V. "High" stands for 3.3V. "NC" stands for "Not Connected."
Table 3.1: Pin Description
Pin No. Symbol
1 VDD
2 VDD
3 GND
4 GND
5 RxIN0-
6 RxIN0+
7 GND
8 RxIN1-
9 RxIN1+
10 GND
11 RxIN2-
12 RxIN2+
13 GND
14 CK IN1-
15 CK IN1+
16 GND
17 RxIN3-
18 RxIN3+
19 MODE
20 SC
IDK-2110R XGA User Manual
Description
Power Supply,3.3V(typical)
Power Supply,3.3V(typical)
Ground
Ground
LVDS receiver signal channel 0
Ground
LVDS receiver signal channel 1
Ground
LVDS receiver signal channel 2
Ground
LVDS receiver signal CK
Ground
LVDS receiver signal channel 3
Bit data select signal (GND: 6bit mode, High:8bit mode)
Scan direction control (GND: Normal, High: Reverse)
10