Pixel Format Image; Pin Description; Table 3.1: Pin Description - Advantech IDK-1110R-series User Manual

3.1

Pixel Format Image

Following figure shows the relationship between input signal and LCD pixel
format.
3.2

Pin Description

LVDS is a differential signal technology for LCD interface and high speed data trans-
fer device. The connector pin definition is as below.
Note "Low" stands for 0V. "High" stands for 3.3V. "NC" stands for "No Connected."

Table 3.1: Pin Description

Pin No. Symbol
1 VDD
2 VDD
3 GND
4 DPS
5 RxIN0-
6 RxIN0+
7 GND
8 RxIN1-
9 RxIN1+
10 GND
11 RxIN2-
12 RxIN2+
13 GND
14 RxCLKIN-
15 RxCLKIN+
16 GND
17 RxIN3-
18 RxIN3+
19 RSV
IDK-1110R User Manual
Description
Power Supply,3.3V(typical)
Power Supply,3.3V(typical)
Ground
Reverse Scan Function [H: Enable; L/NC: Disable]
LVDS differential signal channel 0
LVDS Differential Data Input (R0, R1, R2, R3, R4, R5, G0)
Ground
LVDS differential signal channel 1
LVDS Differential Data Input (G1, G2, G3, G4, G5, B0, B1)
Ground
LVDS differential signal channel 2
LVDS Differential Data Input (B2, B3, B4, B5, DE)
Ground
LVDS differential signal clock
Ground
LVDS receiver signal channel 3, NC for 6 bit LVDS Input
LVDS Differential Data Input (R6, R7, G6, G7, B6, B7, RSV)
Reserved for AUO internal test. Please treat it as NC.
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