Counter Gate Source; Counter Output Destination; Counter Interrupt Flag - Advantech UNO-3072A User Manual

Intel dual core atom embedded automation computer with two/four pci slot extensions
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2.7.7 Counter Gate Source

The gate sources you select determine what kind of gate input signal to
enable your counter/timer when receiving clock input. There are two gate
sources available for the user counters by setting gate source control bits -
CTR0GateSet and CTR1GateSet.
Table 2.11: Counter Gate Source Control Bit
CTR0GateSet
CTR1GateSet

2.7.8 Counter Output Destination

Y ou can choose the output destination of counter 0 and counter 1 by setting
"Output Destination control bits"- CTR0OutSet and CTR1OutSet.
Table 2.12: Counter Output Destination Control Bit
CTR0OutSet
CTR1OutSet

2.7.9 Counter Interrupt Flag

The interrupt flag bit is a flag indicating the status of an interrupt. It is a
readable/writable bit. To find the status of the interrupt, you have to read
the bit value; to clear the interrupt, you have to write "1" to this bit. This bit
must first be cleared to service the next coming interrupt. Besides, you can
choose if counter 0 or counter 1 generate interrupt signal by configuring
"CTR0IntSet" and "CTR1IntSet" control bit.
Table 2.13: Counter Interrupt Flag Control Bit
CTR0F, CTR1F
Read
Write
CTR0IntSet, CTR1IntSet
0
1
UNO-3072A/3074A User Manual
0
Gate source from "CTR0Gate" control bit (Default)
1
Gate source from digital input 0 (DI0) channel
0
Gate source from "CTR1Gate" control bit (Default)
1
Gate source from digital input 2 (DI2) channel
0 Output destination to "CTR0Out" status bit (Default)
1 Output destination to "CTR0Out" status bit and digital output
2 (DO2) channel
0 Output destination to "CTR1Out" status bit. (Default)
1 Output destination to "CTR1Out" status bit and digital output
3 (DO3) channel
0
1
0
1
Counter Interrupt Status
No interrupt
Interrupt occur
Don't care
Clear interrupt
Counter Interrupt Control
Disable (Default)
Enable
28

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