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B.1.3
Register 3: WatchDog Timer Control (WDTCTL)
OFFSET = 0x008
WDTCTL selects the corresponding event as time out. It could be configured to
choose reset, interrupt or digital output signal when time out.
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
User
Settings
Reserved
Bits
Access
31:3
RO
2
R/W
1
R/W
0
R/W
B.1.4
Register 4: WatchDog Timer Counter Clear (WDTCR)
OFFSET = 0x00C
WDTCR clears the watchdog timer. Any value written into WDTCR would set zero
and reload the value stored in WDTLOAD register to watchdog timer. Read/reset
WDTCR is undefined.
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
User
Settings
WDTCR
Bits
Access
31:0
WO
Name D
Description
-
Reserved
0x00 = reset
WDT_DO_EN
Digital Output Enable for Watchdog
Timer time out
0 = Disable digital output
1 = Enable digital output
RESEN
Reset Enable for Watchdog Timer
time out
0 = Disable reset
1 = Enable reset
INTEN
Interrupt Enable for Watchdog
Timer time out
0 = Disable Interrupt
1 = Enable Interrupt
Name D
Description
WDTCR
Watchdog Timer Clear
any value = clear watchdog timer
39
UNO-4673A/4683 Series User Manual
W
R
I
D
E
N
T
S
T
_
E
E
D
N
N
O
_
E
N
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